ASIC Verification Technical Leader || Verilog, System Verilog, Testbench, UVM || Exp - 10+ years

Role overview

ASIC Verification Technical Leader || Verilog, System Verilog, Testbench, UVM || Exp - 10+ years at Cisco

Employment details

• Location: Bangalore [India]

About the employer

• We are recruiting a ASIC Verification Technical Leader to architect and manage the full lifecycle verification of advanced ASICs for Cisco’s core networking platforms.

Additional role details

• Lead dynamic collaboration with verification teams, ensuring robust design and integration.
• Ideal for experienced ASIC design and verification professionals with strong expertise in UVM/System Verilog and related tools.