TECHNICAL LEAD - FPGA Architectures
Happiest Minds · Pune
Collected role description
FPGA Technical Lead FPGA Technical Lead ? Pre-Silicon Validation Location: Pune | Experience: 8-12 Years Seeking an FPGA Technical Lead with expertise in ASIC prototyping and pre-silicon validation on Xilinx FPGA platforms. Responsibilities include RTL migration, partitioning, simulation, synthesis, place & route, timing closure, FPGA bring-up, functional validation, and debugging. Collaborate with ASIC Design, Verification, Firmware, and Software teams to accelerate SoC/ASIC validation. Required Skills: 8-12 years in ASIC Prototyping and Pre-Silicon Validation Strong experience with Xilinx Vivado and FPGA development flows Verilog, SystemVerilog FPGA synthesis, implementation, timing analysis, and timing closure ASIC/SoC FPGA prototyping experience Protocols: SPI, I2C, UART, USB 2.0/3.x, Ethernet, DDR/Memory Interfaces Simulation tools: QuestaSim, ModelSim, Xcelium, or VCS Debug using ILA, logic analyzers, oscilloscopes, and protocol analyzers Preferred: UVM, multi-FPGA systems, ARM SoCs, Python/TCL scripting Education: BE/BTech/ME/MTech in ECE, EE, CSE, or related field.
Collected experience requirement
8 to 11 Years