Physical Design Lead - CPU Team

AMD · Bangalore

Collected role description

Role overview

Physical Design Lead - CPU Team at AMD

Own critical CPU units and drive to convergence from RTL-to-GDSII - synthesis, floor-planning, place and route, timing closure, and signoff

The position will involve working with a very experienced CPU physical design team.

Responsibilities

Understand the micro-architecture to perform feasibility studies on performance, power, and area (PPA) tradeoffs for design closure.
Develop and improve physical design methodologies and customize recipes across various implementation steps to optimize PPA.
Implement floor plan, synthesis, placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), EM/IR and signoff.
Handling different PNR tools - Synopsys fusion compiler, Cadence, PrimeTime, StarRC, Calibre, Apache Redhawk

Required qualifications

Minimum qualification: Benefits offered are described: AMD benefits at a glance . AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Preferred qualifications and skills

7+ years of professional experience in physical design, preferably with high-performance designs.
Must have closed high-performance IPs- CPU/GPU/DPU/memory controller, etc.
Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality; familiarity with tools for schematics, layout, and circuit/logic simulation
Versatility with scripts to automate design flow - Perl/Tcl/Python
Strong communication skills, ability to multi-task across projects, and work with geographically spread out teams
Experience in advanced sub 7nm nodes
Excellent physical design and timing background.
A good understanding of computer architecture is preferred.
Strong analytical/problem-solving skills and pronounced attention to detail.
ACADEMIC CREDENTIALS:
Qualification: Bachelors or Masters in Electronics/Electrical Engineering
#LI-RR1
#LI-Hybrid
Benefits offered are described: AMD benefits at a glance .
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services.
AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.
We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.
AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.

Employment details

Location: Bangalore [India]

About the employer

At AMD, we believe technology can change lives for the better.
Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.

Additional role details

ADVANCE YOUR CAREER.
ADVANCE THE WORLD.
It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us.
And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.
AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI.
MTS Design Engineer
THE ROLE:
The person is responsible for delivering the physical design of critical CPU units to meet challenging goals for frequency, power, and other design requirements for AMD's next-generation processors in a fast-paced environment with cutting-edge technology.
THE PERSON:
Engineer with a good attitude, strong analytical skills, effective communication, and excellent problem-solving abilities.

Collected minimum qualification

Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected preferred qualification

<span style="margin: 0px; padding: 0px;" data-ccp-charstyle="normaltextrun" data-ccp-charstyle-defn="{"ObjectId":"75ee5cbf-7016-4753-9550-8bbf976473cd|105","ClassId":1073872969,"Properties":[469775450,"normaltextrun",201340122,"1",134233614,"true",469778129,"normaltextrun",335572020,"1",469778324,"Default Paragraph Font"]}">MTS Design Engineer <span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> THE ROLE:The position will involve working with a very experienced CPU physical design team. The person is responsible for delivering the physical design of critical CPU units to meet challenging goals for frequency, power, and other design requirements for AMD's next-generation processors in a fast-paced environment with cutting-edge technology.   THE PERSON:Engineer with a good attitude, strong analytical skills, effective communication, and excellent problem-solving abilities. KEY RESPONSIBILITIES:<ul style="direction: ltr; unicode-bidi: embed; margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">Own critical CPU units and drive to convergence from RTL-to-GDSII - synthesis, floor-planning, place and route, timing closure, and signoff</li><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">Understand the micro-architecture to perform feasibility studies on performance, power, and area (PPA) tradeoffs for design closure.</li><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">Develop and improve physical design methodologies and customize recipes across various implementation steps to optimize PPA.</li><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">Implement floor plan, synthesis, placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), EM/IR and signoff.</li><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">Handling different PNR tools - Synopsys fusion compiler, Cadence, PrimeTime, StarRC, Calibre, Apache Redhawk </li></ul> PREFERRED EXPERIENCE:<ul style="direction: ltr; unicode-bidi: embed; margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">7+ years of professional experience in physical design, preferably with high-performance designs.</li><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">Must have closed high-performance IPs-  CPU/GPU/DPU/memory controller, etc.</li><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality; familiarity with tools for schematics, layout, and circuit/logic simulation</li><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">Versatility with scripts to automate design flow - Perl/Tcl/Python</li><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">Strong communication skills, ability to multi-task across projects, and work with geographically spread out teams</li><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">Experience in advanced sub 7nm nodes</li><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">Excellent physical design and timing background.</li><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">A good understanding of computer architecture is preferred.</li><li style="margin-top: 0pt; margin-bottom: 12pt; vertical-align: middle; color: black;">Strong analytical/problem-solving skills and pronounced attention to detail. </li></ul>ACADEMIC CREDENTIALS:<ul><li style="list-style-type: none;"><ul><li style="list-style-type: none;"><ul style="direction: ltr; unicode-bidi: embed; margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; color: black;">Qualification: Bachelors or Masters in Electronics/Electrical Engineering  #LI-RR1 #LI-Hybrid</li></ul></li></ul></li></ul>

Collected experience requirement

7+ years