Staff Engineer Analog Mixed signal verification

Role overview

Staff Engineer Analog Mixed signal verification at Infineon

Develop and maintain SV RNM and WREAL models for analog and mixed-signal IPs.

We are looking for a highly motivated AMS Verification Engineer with 5+ years of experience in System Verilog Real Number Modeling (SV RNM), WREAL modeling, Mixed-Signal Verification, and DMS-based SoC verification.

Responsibilities

• in your new role
• Verify and correlate RNM/WREAL models against transistor-level schematics and analog simulation results.
• Develop automated checkers and reusable verification components.
• Create and deploy System Verilog Assertions (SVA) to verify protocol, functionality, timing, and design correctness.
• Perform SoC-level analog vector verification using DMS verification flows involving UVM testbenches and RNM models.
• Verify AMS IPs such as:
• ADCs
• LDOs
• Buck/Boost Controllers
• Multi-phase Controllers
• Power Switches
• Analyze simulation results, debug failures, and ensure comprehensive functional coverage.
• Collaborate with analog design teams to establish model-to-schematic correlation.
• Develop automation frameworks and regression infrastructure using scripting languages.
• Contribute to AMS verification methodology enhancements and simulator adoption.
• Your profile

Required qualifications

• and skills to help you succeed
• 5+ years of experience in AMS/Mixed-Signal Verification.
• Strong expertise in:
• SystemVerilog RNM (Real Number Modeling)
• WREAL Modeling
• UVM Methodology
• Digital Mixed Signal (DMS) Verification
• System Verilog Assertions (SVA)
• Hands-on experience in developing behavioral models for analog IPs and validating them against schematic-level simulations.
• Experience in SoC-level AMS verification involving RNM models and UVM environments.
• Strong understanding of analog and mixed-signal concepts including:
• Data Converters (ADC)
• Voltage Regulators (LDO)
• Power Management ICs
• Buck/Boost Converters
• Good understanding of EDA tools and simulators:
• Cadence Virtuoso Schematic Editor
• Cadence Xcelium
• APS (Accelerated Parallel Simulator)
• XPS
• AMS/DMS Simulation Environments
• Experience with verification planning, coverage closure, debugging, and regression management.
• Knowledge of assertion-based verification techniques and methodologies.
• Strong scripting skills in:
• Python
• Perl
• Shell Scripting
• Experience developing verification automation, checkers, and regression flows.
• #WeAreIn for driving decarbonization and digitalization.
• As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT.
• Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals.
• Be a part of making life easier, safer and greener.
• Are you in?
• We are on a journey to create the best Infineon for everyone.
• We strive to create the best Infineon for everyone by embracing diversity and inclusion.
• We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.
• Our hiring decisions are based on skills and experience.
• Even if you don’t meet every requirement, we encourage you to apply.
• Please let your recruiter know if you need any accommodations during the interview process.
• Learn more about our various contact channels and about Diversity & Inclusion at Infineon.
• Vidhi Thakkar

Employment details

• Location: Bangalore BTP

Additional role details

• The candidate will be responsible for developing and validating behavioral models of analog IPs, creating verification environments, implementing SV Assertions, and driving AMS verification for power management and mixed-signal designs.
• Your role