ASIC DFT Engineering Technical Leader | ATPG, MBIST, SSN, SCAN | 12+ years

Role overview

ASIC DFT Engineering Technical Leader | ATPG, MBIST, SSN, SCAN | 12+ years at Cisco

Take on the role of ASIC DFT Engineering Technical Leader, driving the implementation of Hardware Design-for-Test (DFT) features for advanced networking chips.

Responsibilities

• Lead DFT integration, collaborate with cross-functional teams, and ensure testability in chip design.

Employment details

• Location: Bangalore [India], Chennai [India], Hyderabad [Telangāna] [India]

Additional role details

• Ideal for experienced engineers with deep expertise in DFT, test, and ASIC design.