Senior Engineer- Clock Planning- PD-Full Chip/Sub system
Quest Global · Bangalore
Collected role description
Role overview
Senior Engineer- Clock Planning- PD-Full Chip/Sub system at Quest Global
We are seeking a Senior Engineer to drive full-chip clock architecture and planning, ensuring scalable distribution and robust timing.
Responsibilities
- Lead technical reviews and collaborate with cross-functional teams.
Employment details
- Location: Bangalore [Karnataka] [India], Hyderabad [Telangana] [India]
Additional role details
- Ideal for candidates with deep expertise in CTS and full-chip clock planning.