CPU Core Design Verification Manager

Role overview

CPU Core Design Verification Manager at Tenstorrent

<p>We welcome candidates at various experience levels for this role.

Responsibilities

• You will manage a team of core-level verification engineers, partner closely with our Santa Clara and Austin sites, and own delivery of core verification from architecture definition through tapeout readiness.</p>

Employment details

• Location: Bengaluru [Karnataka] [India]

Application details

• During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.</p>

About the employer

• <div class="content-intro"><p>Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency.
• <li>How Tenstorrent applies AI across the DV lifecycle — from test planning and stimulus through regression debug, triage, and coverage analysis — using workflows designed to keep context tight and outputs auditable.</li>

Benefits

• <p><em>Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.</em></p><div class="content-conclusion"><p><em>This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S.

Additional role details

• With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors.
• Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible.
• We value collaboration, curiosity, and a commitment to solving hard problems.
• We are growing our team and looking for contributors of all seniorities.</p></div><p>At Tenstorrent, we build open, state of the art compute for real workloads and real developers.</p>
• <p>You will lead our Bangalore-based CPU Core Design Verification team, driving both the technical strategy and the people leadership behind verification of our high-performance, out-of-order RISC-V CPUs.
• <p>This role is<strong> </strong>hybrid based out of Bangalore, India, with regular collaboration across our globally distributed CPU organization.</p>
• <p> </p>
• <p><strong>Who You Are</strong></p>
• <ul>
• <li>15+ years of CPU/DV experience, including 7+ years leading verification teams, with strong hands-on expertise in high-performance, out-of-order CPU verification.</li>
• <li>Deep microarchitecture & verification expertise, including ISA, RTL, UVM/CVM, testbench development, regressions, coverage, and complex debug.</li>
• <li>Strong people and technical leadership, with experience hiring, mentoring, developing engineers, and setting verification strategy and methodology across teams.</li>
• <li>Highly collaborative and execution-focused, comfortable working across time zones and driving cross-functional debug with Design, DV, Emulation, and Post-Silicon teams, including P0 issues and AI-assisted verification workflows.</li>
• </ul>
• <p><strong>What We Need</strong></p>
• <li data-section-id="12k6v9h" data-start="71" data-end="190">Build and lead the Bangalore CPU Core DV team, owning hiring, mentoring, performance management, and team growth.</li>
• <li data-section-id="1dydb1v" data-start="191" data-end="373">Own verification strategy and execution for high-performance, out-of-order RISC-V CPU cores, covering ISA, microarchitecture, UVM/CVM methodology, infrastructure, and coverage.</li>
• <li data-section-id="171g3ai" data-start="374" data-end="555">Drive cross-site execution with DV and design leads in Santa Clara and Austin, aligning coverage, schedules, tapeout readiness, and closure of critical bugs and coverage gaps.</li>
• <li data-section-id="133bt5h" data-start="556" data-end="763" data-is-last-node="">Stay technically engaged while leading the team, contributing to debug, code/testplan and architecture reviews, and championing AI-assisted tools for triage, stimulus generation, and coverage analysis.</li>
• <p><strong>What You Will Learn</strong></p>
• <li>How Tenstorrent designs and verifies high-performance RISC-V CPU cores and clusters across a globally distributed organization.</li>
• <li>How to scale a verification team and its infrastructure across core, cluster, and chip-level environments spanning multiple sites.</li>
• <li>Techniques for spanning pre-silicon, emulation, and post-silicon verification with shared stimulus and methodology.</li>
• <li>How to build and run a high-performing verification organization inside a fast-growing, technically ambitious silicon company.</li>
• Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S.
• Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.</em></p></div>