AI/ML Compiler Developer (NPU Acceleration)

AMD · Hyderabad

Collected role description

Role overview

AI/ML Compiler Developer (NPU Acceleration) at AMD

Design and implement highly optimized C++ kernel library for NPU/GPU .

THE ROLE:

In this role, the individual will be responsible for developing AI/ML specific C/C++ kernels and dataflow schedules for AMD Ryzen Processors built on XDNA Neural Processor Units (NPU) to map LLMs, Stable Diffusion networks on NPU.

Responsibilities

Kernel Development:
Collaborate with the research and software teams to integrate these kernels into the existing software stack.
Vector Processor Optimization:
Work closely with hardware engineers to understand the architecture of VLIW vector core units such as MAC, GeMM, and non-linear functions.
Develop vectorized code that leverages SIMD (Single Instruction, Multiple Data) and ILP (instruction level parallelism) for maximum performance.
Performance Profiling and Tuning:
Profile and analyze the performance of existing kernels.
Identify bottlenecks and optimize critical sections for better throughput.
Testing and Validation:
Develop CPU models for the ML operators in C++/ Python to validate accuracy.
Write unit tests and integration tests to ensure correctness and reliability.
Validate kernel performance across different hardware platforms.
Documentation and Collaboration:
Document design specs for new kernels and the performance improvements.
Follow coding guidelines, use tools like git to maintain code and create pull-requests, and documentation.
Collaborate with cross-functional teams, including machine learning researchers and software engineers.

Required qualifications

Minimum qualification: Benefits offered are described: AMD benefits at a glance . AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Preferred qualifications and skills

Excellent C/C++ and Python coding skills
Good understanding of SIMD/Tensor/VLIW processor architecture to exploit parallelism.
Experience with vectorized programming (SIMD) and parallel computing.
Familiarity with machine learning frameworks (e.g., TensorFlow, PyTorch ) is a plus.
Experience with silicon bring - up and pre-silicon validation on Emulation platforms is a plus.
Knowledge of low-level hardware details (cache hierarchy, memory access patterns) is desirable.
Excellent problem-solving skills and a passion for performance optimization.
ACADEMIC CREDENTIALS:
BS/Masters/PhD degree in Computer Science, Electrical Engineering, or a related field with around 10/8/5 year experience respectively.
#LI-NR1
Benefits offered are described: AMD benefits at a glance .
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services.
AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.
We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.
AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.

Employment details

Location: Hyderabad [India]

About the employer

At AMD, we believe technology has the power to solve the world’s most important challenges.

Benefits

From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Additional role details

ADVANCE YOUR CAREER.
ADVANCE THE WORLD.
Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward.
Join us and, together, we’ll advance your career.
MTS SOFTWARE DEVELOPMENT ENG INEER
We are looking for a dynamic, energetic Lead / Staff Software Engineer to join our growing team in AI (Artificial Intelligence) group.
As a C++ Kernel Developer, you will play a crucial role in designing, optimizing , and implementing machine learning kernels specifically tailored for vector processors.
Your work will directly impact the efficiency, speed, and accuracy of our machine learning models .

Collected minimum qualification

Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected preferred qualification

MTS SOFTWARE DEVELOPMENT ENGINEER  THE ROLE:  We are looking for a dynamic, energetic Lead / Staff Software Engineer to join our growing team in AI (Artificial Intelligence) group. In this role, the individual will be responsible for developing AI/ML specific C/C++ kernels and dataflow schedules for AMD Ryzen Processors built on XDNA Neural Processor Units (NPU) to map LLMs, Stable Diffusion networks on NPU. As a C++ Kernel Developer, you will play a crucial role in designing, optimizing, and implementing machine learning kernels specifically tailored for vector processors. Your work will directly impact the efficiency, speed, and accuracy of our machine learning models.   KEY RESPONSIBILITIES: <ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="" data-font="Symbol" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="1" data-aria-level="1">Kernel Development: </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 72px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="o" data-font="Courier New" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":1440,"335559991":360,"469769226":"Courier New","469769242":[9675],"469777803":"left","469777804":"o","469777815":"multilevel"}" data-aria-posinset="1" data-aria-level="2">Design and implement highly optimized C++ kernel library for NPU/GPU. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 72px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="o" data-font="Courier New" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":1440,"335559991":360,"469769226":"Courier New","469769242":[9675],"469777803":"left","469777804":"o","469777815":"multilevel"}" data-aria-posinset="2" data-aria-level="2">Collaborate with the research and software teams to integrate these kernels into the existing software stack. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="" data-font="Symbol" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="2" data-aria-level="1">Vector Processor Optimization: </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 72px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="o" data-font="Courier New" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":1440,"335559991":360,"469769226":"Courier New","469769242":[9675],"469777803":"left","469777804":"o","469777815":"multilevel"}" data-aria-posinset="1" data-aria-level="2">Work closely with hardware engineers to understand the architecture of VLIW vector core units such as MAC, GeMM, and non-linear functions. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 72px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="o" data-font="Courier New" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":1440,"335559991":360,"469769226":"Courier New","469769242":[9675],"469777803":"left","469777804":"o","469777815":"multilevel"}" data-aria-posinset="2" data-aria-level="2">Develop vectorized code that leverages SIMD (Single Instruction, Multiple Data) and ILP (instruction level parallelism) for maximum performance. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="" data-font="Symbol" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="3" data-aria-level="1">Performance Profiling and Tuning: </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 72px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="o" data-font="Courier New" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":1440,"335559991":360,"469769226":"Courier New","469769242":[9675],"469777803":"left","469777804":"o","469777815":"multilevel"}" data-aria-posinset="1" data-aria-level="2">Profile and analyze the performance of existing kernels. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 72px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="o" data-font="Courier New" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":1440,"335559991":360,"469769226":"Courier New","469769242":[9675],"469777803":"left","469777804":"o","469777815":"multilevel"}" data-aria-posinset="2" data-aria-level="2">Identify bottlenecks and optimize critical sections for better throughput. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="" data-font="Symbol" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="4" data-aria-level="1">Testing and Validation: </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 72px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="o" data-font="Courier New" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":1440,"335559991":360,"469769226":"Courier New","469769242":[9675],"469777803":"left","469777804":"o","469777815":"multilevel"}" data-aria-posinset="1" data-aria-level="2">Develop CPU models for the ML operators in C++/ Python to validate accuracy. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 72px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="o" data-font="Courier New" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":1440,"335559991":360,"469769226":"Courier New","469769242":[9675],"469777803":"left","469777804":"o","469777815":"multilevel"}" data-aria-posinset="2" data-aria-level="2">Write unit tests and integration tests to ensure correctness and reliability. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 72px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="o" data-font="Courier New" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":1440,"335559991":360,"469769226":"Courier New","469769242":[9675],"469777803":"left","469777804":"o","469777815":"multilevel"}" data-aria-posinset="3" data-aria-level="2">Validate kernel performance across different hardware platforms. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="" data-font="Symbol" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="5" data-aria-level="1">Documentation and Collaboration: </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 72px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="o" data-font="Courier New" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":1440,"335559991":360,"469769226":"Courier New","469769242":[9675],"469777803":"left","469777804":"o","469777815":"multilevel"}" data-aria-posinset="1" data-aria-level="2">Document design specs for new kernels and the performance improvements. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 72px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="o" data-font="Courier New" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":1440,"335559991":360,"469769226":"Courier New","469769242":[9675],"469777803":"left","469777804":"o","469777815":"multilevel"}" data-aria-posinset="2" data-aria-level="2">Follow coding guidelines, use tools like git to maintain code and create pull-requests, and documentation. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 72px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="o" data-font="Courier New" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":1440,"335559991":360,"469769226":"Courier New","469769242":[9675],"469777803":"left","469777804":"o","469777815":"multilevel"}" data-aria-posinset="3" data-aria-level="2">Collaborate with cross-functional teams, including machine learning researchers and software engineers. </li></ul> PREFERRED EXPERIENCE:  <ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="1" data-aria-level="1">Excellent C/C++ and Python coding skills </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="2" data-aria-level="1">Good understanding of SIMD/Tensor/VLIW processor architecture to exploit parallelism. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="3" data-aria-level="1">Experience with vectorized programming (SIMD) and parallel computing. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="4" data-aria-level="1">Familiarity with machine learning frameworks (e.g., TensorFlow, PyTorch) is a plus. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="5" data-aria-level="1">Experience with silicon bring-up and pre-silicon validation on Emulation platforms is a plus. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="6" data-aria-level="1">Knowledge of low-level hardware details (cache hierarchy, memory access patterns) is desirable. </li></ul><ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" aria-setsize="-1" data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="7" data-aria-level="1">Excellent problem-solving skills and a passion for performance optimization. </li></ul> ACADEMIC CREDENTIALS: BS/Masters/PhD degree in Computer Science, Electrical Engineering, or a related field with around 10/8/5 year experience respectively. #LI-NR1

Collected experience requirement

5 years