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Lead engineer at LTTS

LTTS · Bangalore

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Collected role description

VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites. VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites. VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites. VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites. VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites.

VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites.VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites.VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites.VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites.VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites.

Job Description VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites. VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites. VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites. VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites. VLSI Skilled engineers with RTL, DV, DFT and PD skills working across the IP, SS and SOC Level activites. Job Requirement DFT DV ATPG MBSIT

Collected experience requirement

1-15 years (inferred)