Senior FPGA Design Engineer - Module Lead

We are seeking a Senior FPGA Design Engineer with expertise in FPGA architecture, RTL coding (VHDL/Verilog), and Xilinx tools (Vivado, HLS). The ideal candidate should have experience with Zynq 7000 Series SOC , Xilinx IP cores, and DSP algorithm implementation. Strong analytical skills, proficiency in MATLAB/Octave for modeling, and experience with AD9361/9371/AD9009 transceivers are essential. Excellent communication and teamwork abilities are required.