Senior Design Engineer

Responsibilities

Main responsibility on SoC design for MCU/MPU with security and connectivity, which targets IoT/Edge/Auto application. Responsibility to design subsystem and top logic/integration for SoC. Responsibility on quality of SoC design with quality check flow, such as LINT/CDC/RDC/CLP. Support IP design and SoC verification. Work closely with other function teams on architecture definition as well as power/timing analysis. Join design methodology innovation for application

Requirements

Master or bachelor’s degree, majoring in Microelectronics, electronic engineering, computer science or relevant disciplines. Experience on design or verification with Verilog/SV/VHDL. Understand SoC digital design and verification flow. Excellent problem analyzing/solving skills. Good collaboration skillset to support global projects. Hard working and team player. Good knowledge in C language, Verilog/VHDL/System Verilog. Nice to have experience in AI. Nice to have know-how of ARM or AMBA system. More information about NXP in India... #LI-9415