Senior Manager - System Validation

AMD · Bangalore

Collected role description

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. THE ROLE: We are looking for a Senior Manager to lead System Validation for BIOS, Firmware and Driver validation activities across our embedded product portfolio. This role will provide hands-on technical leadership, drive validation coverage, strengthen test planning and execution discipline, and ensure timely visibility to critical issues, risks and customer-impacting defects. The leader will work closely with development, silicon IP enablement, silicon validation, platform and customer-facing teams to ensure validation readiness, reduce test escapes and improve engineering effectiveness through scale and AI-driven initiatives.<div>THE PERSON</div><ul><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">A strong technical validation leader with deep understanding of system-level validation across BIOS, firmware, drivers and platform software stacks.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Demonstrates ownership in defining validation coverage, test strategy, execution governance and defect triage for complex silicon and platform programs.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Builds trusted networks across client and server ecosystems, development teams, silicon IP enablement teams and validation organizations to improve end-to-end product readiness.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Balances technical depth with people leadership, helping the team grow in capability, execution maturity, collaboration and customer orientation.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Brings a continuous improvement mindset with the ability to drive scale, automation, traceability and AI-enabled productivity across validation workflows.</li></ul>KEY RESPONSIBILITIES<ul><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Provide technical leadership for system validation activities covering BIOS, firmware and driver validation across assigned embedded programs.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Define and drive the right validation coverage by partnering with architecture, development, silicon IP enablement, silicon validation, platform and customer enablement teams.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Own test management discipline including validation planning, test readiness, execution tracking, completion governance and timely reporting of progress, gaps and risks.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Drive first-level triage for critical issues by ensuring structured debug data collection, clear ownership alignment, prioritization and timely handoff to the appropriate development teams.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Establish strong collaboration forums with BIOS, firmware, driver, silicon IP, silicon validation and platform teams to close coverage gaps and improve defect discovery earlier in the lifecycle.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Build and maintain technical connects in the client and server spaces from which the group leverages devices, ecosystems, validation methodologies and learnings.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Reduce validation escapes through improved test strategy, coverage analysis, defect trend reviews, regression rigor and disciplined exit criteria.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Support customer escalations and critical field issue triage as required, ensuring responsiveness, technical clarity and coordinated execution across engineering owners.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Lead team development by coaching engineers and leads, improving technical depth, strengthening ownership behaviors and building succession for key validation areas.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Drive scale initiatives across validation execution, including automation, reusable test assets, consistent dashboards, traceability from requirements to tests, and execution efficiency improvements.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Champion AI initiatives that improve test planning, coverage mapping, traceability, execution tracking, defect analytics, reporting quality and validation productivity.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Partner with program management and engineering leadership to provide accurate status, risk visibility, decision points and recovery plans for validation milestones.</li></ul>PREFERRED EXPERIENCE<ul><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">20+ years of industry experience with 8+ years of exposure with people management roles</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Experience leading system validation, post-silicon validation, platform validation, BIOS validation, firmware validation or driver validation teams for complex silicon or platform products.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Strong understanding of validation lifecycle, test plan development, coverage definition, test execution governance, defect management, regression strategy and exit criteria.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Hands-on familiarity with BIOS, UEFI, firmware, drivers, platform initialization, silicon bring-up, debug flows and system-level validation environments.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Experience collaborating with silicon IP enablement, silicon validation, firmware, BIOS, driver, platform, architecture and customer-facing teams.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Demonstrated ability to lead issue triage, drive technical discussions, identify ownership, escalate risks and close critical defects with urgency.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Experience with customer escalations, field issue debug, escape analysis and corrective action planning.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Working knowledge of test management tools, defect tracking systems, coverage dashboards, automation frameworks and traceability practices.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Experience applying automation, data analytics or AI-assisted methods to improve validation planning, execution tracking, reporting or defect insights.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Prior people management experience with demonstrated ability to hire, coach, develop and retain high-performing validation engineers and leads.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Strong communication skills with the ability to present validation status, risks, technical issues and execution plans to engineering and business leadership.</li></ul>Academic Credentials<ul><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science or a related technical discipline.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Equivalent industry experience in system validation, firmware, BIOS, driver, silicon validation or platform engineering will be considered.</li></ul>#LI-NR1 Benefits offered are described: <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected minimum qualification

Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected preferred qualification

THE ROLE: We are looking for a Senior Manager to lead System Validation for BIOS, Firmware and Driver validation activities across our embedded product portfolio. This role will provide hands-on technical leadership, drive validation coverage, strengthen test planning and execution discipline, and ensure timely visibility to critical issues, risks and customer-impacting defects. The leader will work closely with development, silicon IP enablement, silicon validation, platform and customer-facing teams to ensure validation readiness, reduce test escapes and improve engineering effectiveness through scale and AI-driven initiatives.<div>THE PERSON</div><ul><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">A strong technical validation leader with deep understanding of system-level validation across BIOS, firmware, drivers and platform software stacks.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Demonstrates ownership in defining validation coverage, test strategy, execution governance and defect triage for complex silicon and platform programs.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Builds trusted networks across client and server ecosystems, development teams, silicon IP enablement teams and validation organizations to improve end-to-end product readiness.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Balances technical depth with people leadership, helping the team grow in capability, execution maturity, collaboration and customer orientation.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Brings a continuous improvement mindset with the ability to drive scale, automation, traceability and AI-enabled productivity across validation workflows.</li></ul>KEY RESPONSIBILITIES<ul><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Provide technical leadership for system validation activities covering BIOS, firmware and driver validation across assigned embedded programs.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Define and drive the right validation coverage by partnering with architecture, development, silicon IP enablement, silicon validation, platform and customer enablement teams.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Own test management discipline including validation planning, test readiness, execution tracking, completion governance and timely reporting of progress, gaps and risks.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Drive first-level triage for critical issues by ensuring structured debug data collection, clear ownership alignment, prioritization and timely handoff to the appropriate development teams.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Establish strong collaboration forums with BIOS, firmware, driver, silicon IP, silicon validation and platform teams to close coverage gaps and improve defect discovery earlier in the lifecycle.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Build and maintain technical connects in the client and server spaces from which the group leverages devices, ecosystems, validation methodologies and learnings.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Reduce validation escapes through improved test strategy, coverage analysis, defect trend reviews, regression rigor and disciplined exit criteria.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Support customer escalations and critical field issue triage as required, ensuring responsiveness, technical clarity and coordinated execution across engineering owners.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Lead team development by coaching engineers and leads, improving technical depth, strengthening ownership behaviors and building succession for key validation areas.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Drive scale initiatives across validation execution, including automation, reusable test assets, consistent dashboards, traceability from requirements to tests, and execution efficiency improvements.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Champion AI initiatives that improve test planning, coverage mapping, traceability, execution tracking, defect analytics, reporting quality and validation productivity.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Partner with program management and engineering leadership to provide accurate status, risk visibility, decision points and recovery plans for validation milestones.</li></ul>PREFERRED EXPERIENCE<ul><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">20+ years of industry experience with 8+ years of exposure with people management roles</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Experience leading system validation, post-silicon validation, platform validation, BIOS validation, firmware validation or driver validation teams for complex silicon or platform products.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Strong understanding of validation lifecycle, test plan development, coverage definition, test execution governance, defect management, regression strategy and exit criteria.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Hands-on familiarity with BIOS, UEFI, firmware, drivers, platform initialization, silicon bring-up, debug flows and system-level validation environments.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Experience collaborating with silicon IP enablement, silicon validation, firmware, BIOS, driver, platform, architecture and customer-facing teams.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Demonstrated ability to lead issue triage, drive technical discussions, identify ownership, escalate risks and close critical defects with urgency.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Experience with customer escalations, field issue debug, escape analysis and corrective action planning.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Working knowledge of test management tools, defect tracking systems, coverage dashboards, automation frameworks and traceability practices.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Experience applying automation, data analytics or AI-assisted methods to improve validation planning, execution tracking, reporting or defect insights.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Prior people management experience with demonstrated ability to hire, coach, develop and retain high-performing validation engineers and leads.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Strong communication skills with the ability to present validation status, risks, technical issues and execution plans to engineering and business leadership.</li></ul>Academic Credentials<ul><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science or a related technical discipline.</li><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Equivalent industry experience in system validation, firmware, BIOS, driver, silicon validation or platform engineering will be considered.</li></ul>#LI-NR1

Collected experience requirement

20+ years