Senior Engineer I Design

organization? We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: DFT Engineer We are looking for a skilled and motivated DFT Engineer with 5+ years of experience in VLSI design. The candidate will be responsible for handling DFT activities (Boundary scan, Memory BIST and scan insertion, ATPG, gate-level simulations and Silicon Bring up and failure debug on ATE) across complex So C/IP designs and will work closely with RTL and STA teams to ensure high-performance and power-efficient silicon implementation. Key RESPONSIBILITIES: Perform block-level and full-chip DFT activities for ASIC/So C designs. Boundary scan insertion, Memory BIST insertions and Scan insertions with compression logic Understanding and fixing the DFT DRCs rules ATPG (stuck-at , transition and Iddq mode) Patterns verification with timing and debug DFT issues across RTL/Gate-level stages Collaborate with ATE teat to support first silicon bring-up , failure analysis Required QUALIFICATIONS: Bachelor’s or master’s degree in Electronics, Electrical Engineering, VLSI, or related field. 5+ years of hands-on experience in Design For Testability for ASIC/So C designs. Strong understanding of digital design fundamentals and timing concepts. Experience with industry-standard DFT tools such as Siemens, Cadence and Synopsys Good knowledge on DFT DCR rules Familiarity with scripting languages such as Tcl, Perl, or Python. Strong analytical, communication, and teamwork skills. Requirements/ QUALIFICATIONS: Bachelors Degree in Electronics Engineering. Travel Time: No Travel To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes. At Microchip, employees are our greatest strength. As one of the top performing semiconductor companies in the world, we are led by a set of guiding values and a mission to empower innovation to enhance the human experience. We work tirelessly to create a company culture that highlights how important every employee is to our mission. Microchip Recruitment Privacy Notice Recruitment Scam Alert Microchip will never: Request banking or payment information during the application or interview process. Ask candidates to register or pay for a training class as part of the application or interview process. Ask candidates to receive or ship packages or goods as part of the recruitment process. Use email address not ending with "@microchip.com". Use instant messaging to communicate. Be wary of generic emails or vague job details. If something feels suspicious, stop communicating immediately. To report potential scams, contact us at HR.Compliance@microchip.com.