Senior DFT Design/Micro architect Engineer, Google Cloud
Google · Bangalore
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Collected role description
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Collected minimum qualification
Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.; 8 years of experience in the implementation and validation of DFT technologies.; Experience with multiple projects in DFT design and verification, DFT specification, definition, architecture, and insertion.; Experience with DFT techniques and tools, ASIC DFT synthesis, simulation, and verification flow.; Experience in leading DFT activities throughout an ASIC development flow.
Collected preferred qualification
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or a related field.; Experience in IP integration (e.g., memories, test controllers, Test Access Point (TAP), and DFT for Multi die SoCs).; Experience in fault modeling.; Experience in SoC cycles, silicon bringup, and silicon debug activities.
Collected experience requirement
8 years of experience in the implementation and validation of DFT technologies.