Senior Lead Engineer - RTL

Quest Global · Hyderabad

Source and collection record

Last observed by our collector: 9 October 2026 at 12:00 am IST. This is not a manual review or a confirmation from the employer.

Employer requisition: P-120090

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Collected role description

Exciting opportunity for a Senior Lead Engineer to design and develop RTL (Verilog/SystemVerilog) for ASIC/SoC. Lead module-level architecture and collaborate with global teams. Ideal for candidates with strong RTL design experience and expertise in SoC architecture.