Senior Lead Engineer - DFT-Timing
Quest Global · Hyderabad
Source and collection record
Last observed by our collector: . This is not a manual review or a confirmation from the employer.
Employer requisition: P-118715
Job type and experience labels are automated discovery categories. The employer determines eligibility. Original experience wording was not retained separately; check the current employer page.
Your application evidence checklist
Mark the statements you can support after reading the employer source. This checklist stays on this page; it does not score your eligibility or submit an application.
0 of 2 checks marked. Keep unresolved requirements as questions for the employer.
Collected role description
We are looking for a Senior Lead Engineer to drive DFT-DV timing closure and support DVT reset bring up. You will ensure successful implementation of DFT-DV strategies, focusing on test mode STA and debugging violations. Ideal for candidates with significant experience in DFT-DV pattern support and advanced node expertise.