DV Senior Engineer

Quest Global · Bangalore

Source and collection record

Last observed by our collector: 9 October 2026 at 12:00 am IST. This is not a manual review or a confirmation from the employer.

Employer requisition: P-116227

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Collected role description

Join us as a Senior Gate-Level Simulation (GLS) Verification Engineer, ensuring the correctness of complex SoC designs after synthesis and routing. Take ownership of GLS verification strategies and debug intricate test failures. Ideal for experienced engineers with deep expertise in digital design and gate-level simulation.