ASIC Physical Design, Staff Engineer - 18156

Learn more about applying for ASIC Physical Design, Staff Engineer - 18156 at Synopsys Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Date posted 08/16/2026 Category Engineering Hire Type Employee Job ID 18156 Remote Eligible No Date Posted 08/16/2026 We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent years turning RTL into silicon that actually works, not just passes checks, but ships, performs, and comes back from the fab without surprises. You know that a floorplan decision made in week two will either save or cost you three weeks at tape-out, and you are the kind of engineer who sees that trade-off clearly and makes the call with confidence. You have lived through enough timing closures to know when a violation is real and when it is noise, and you do not panic when the sign-off checklist grows to 47 items two days before delivery. Scripting is not a side task for you, it is how you scale yourself. You write Tcl and Python that other engineers can actually read and use, because you have seen what happens when flows are held together by one person's undocumented magic. You do not wait for perfect documentation from the foundry. You read what exists, ask the right questions, and build a methodology that works within the constraints you have. When IR-drop blows up or a clock tree will not converge, you dig in, find the root cause, and fix it in a way that does not break three other things downstream. What You'll Be Doing Own the full RTL-to-GDSII physical implementation flow for memory test-chip blocks and top-level designs, driving synthesis, floorplanning, power planning, placement, CTS, routing, and sign-off closure Develop and maintain Back-End implementation and sign-off flows including Pn R, STA, PV, IR/EM analysis, and extraction methodologies Review and implement foundry sign-off requirements and tape-out checklists, ensuring manufacturing compliance and first-pass silicon success Execute timing analysis and closure across multiple PVT corners, optimizing for power, performance, and area Drive physical and electrical verification using Synopsys IC Validator, resolving DRC, LVS, ERC, antenna, EM, IR-drop, and signal integrity issues Collaborate with Foundry, CAD, Front-End, DFT, STA, and Design teams to resolve implementation challenges and hit project milestones Build automation frameworks and scripts in Python, Tcl, and Perl that improve design productivity and flow efficiency The Impact You Will Have Enable successful first-pass silicon for memory test-chip designs by delivering clean, manufacturable GDSII with complete sign-off collateral Reduce design cycle time through robust, repeatable Back-End flows that scale across multiple projects and process nodes Eliminate late-stage surprises by catching timing, power, and physical issues early and building methodologies that prevent recurrence Strengthen foundry partnerships by implementing sign-off requirements correctly and providing feedback that improves design enablement Accelerate team productivity by delivering automation that removes manual bottlenecks and makes complex tasks repeatable Contribute to Synopsys IP competitiveness by ensuring memory designs meet aggressive performance and power targets on advanced nodes Elevate team capability by sharing knowledge, documenting best practices, and building flows others can learn from and extend What You'll Need Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline 5+ years of hands-on ASIC physical design experience with proven silicon tape-outs, ideally on advanced process nodes Deep expertise across the full RTL-to-GDSII implementation flow including synthesis, floorplanning, power planning, placement, CTS, routing, and sign-off Strong proficiency with Synopsys tools including Fusion Compiler or ICC2, Prime Time, Star RC, and IC Validator Solid scripting and automation skills in Tcl, Python, and Perl with a track record of building flows that improve team efficiency Experience setting up and maintaining Back-End design and sign-off methodologies including Pn R, STA, PV, extraction, and IR/EM analysis Ability to interpret and implement foundry sign-off requirements and tape-out checklists to ensure manufacturing readiness Who You Are You can look at a floorplan and immediately see the congestion, power, or timing problems that will surface later, and you address them before they become crises When a sign-off violation appears, you dig into the data, trace it to root cause, and fix it in a way that makes sense for the design and the flow You write scripts and build flows with the next engineer in mind, clear variable names, comments that explain why, and structure that someone else can extend You communicate clearly across disciplines, translating technical issues for front-end designers or CAD engineers without losing the thread You stay calm under pressure, especially in the final weeks before tape-out, and you help the team stay focused on what actually matters The Team You'll Be Part Of Your recruiter will share more about the team structure and mission during the interview process. Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email Linked In X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Hyderabad View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys! 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