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Pre SIlicon Validation Engineer -(Embedded C, Zebu)- Pune -REQ_2416

Tessolve · Bangalore

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Collected role description

<p class="elementtoproof"><span style="font-size:11pt;font-family:Calibri, sans-serif;"> </span></p><p></p><p class="elementtoproof"><b><span style="font-size:11pt;font-family:Calibri, sans-serif;">About Tessolve: </span></b><span style="font-size:11pt;font-family:Calibri, sans-serif;"> </span></p><p></p><p class="elementtoproof"><span style="font-size:11pt;font-family:Calibri, sans-serif;">Tessolve Semiconductors a venture of Hero Electronix, part of $5B Hero Group companies a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions. Currently we are 2300+ employees worldwide. </span></p><p></p><p class="elementtoproof"><span style="font-size:11pt;font-family:Calibri, sans-serif;">We are Global Multi- National Company having Engineering and Sales presences in India, Malaysia, Singapore, USA, UK, Europe, and China. Tessolve has strategic and sustainable growth plan to ensure the business stability to our valued customers and to protect the career of our employees even under disturbed Business situations. </span></p><p></p><p class="elementtoproof" style="margin-bottom:12pt;"><span style="font-family:Calibri, sans-serif;"> </span></p><p class="elementtoproof" style="margin-bottom:12pt;"><span style="font-family:Calibri, sans-serif;">Areas of Responsibility:</span></p><p></p><p class="elementtoproof" style="margin-bottom:12pt;"><span style="font-family:Calibri, sans-serif;">· Define and document test strategies, methodologies, and test cases (IQ, OQ, PQ) to meet product requirements. · Perform functional, performance, and system-level tests ( Silicon, HW/FW). Debug issues, identify root causes of failures, and suggest improvements.. · Develop automated validation test scripts and tools to improve efficiency and coverage. · Solid understanding of Key IP‘s: CPUSS(core), PERI, LPDDR, SPI, I2C, USB etc. · Engage with architecture, design, and manufacturing teams to ensure system readiness</span></p><p></p><p class="elementtoproof" style="margin-bottom:12pt;"><span style="font-family:Calibri, sans-serif;">Experience:</span></p><p></p><div class="x_elementToProof" style="border:0px;font-size:12pt;line-height:inherit;font-family:Aptos, 'Aptos_EmbeddedFont', 'Aptos_MSFontService', Calibri, Helvetica, sans-serif, serif, EmojiFont;margin:0cm;padding:0px;vertical-align:baseline;color:rgb(0,0,0);"><b>Mandatory Skills: Embedded C, C, ARM, SOC, </b>emulation platform like (<b>Zebu, veloce & palladium</b>) any one skill. I2C, CAN, SPI, EDM</div><div class="x_elementToProof" style="border:0px;font-size:12pt;line-height:inherit;font-family:Aptos, 'Aptos_EmbeddedFont', 'Aptos_MSFontService', Calibri, Helvetica, sans-serif, serif, EmojiFont;margin:0cm;padding:0px;vertical-align:baseline;color:rgb(0,0,0);"><b>Job Description:</b></div><ul style="color:rgb(36,36,36);font-family:'Segoe UI', '-apple-system', BlinkMacSystemFont, Roboto, 'Helvetica Neue', sans-serif;font-size:15px;margin-top:0cm;margin-bottom:0cm;"><li style="font-family:Aptos, 'Aptos_EmbeddedFont', 'Aptos_MSFontService', Calibri, Helvetica, sans-serif;font-size:12pt;color:rgb(0,0,0);margin:0cm;">Used ARM architecture in projects</li><li style="font-family:Aptos, 'Aptos_EmbeddedFont', 'Aptos_MSFontService', Calibri, Helvetica, sans-serif;font-size:12pt;color:rgb(0,0,0);margin:0cm;">Pre silicon IP functional validation experience using emulation platform like (Zebu, veloce & palladium) </li><li style="font-family:Aptos, 'Aptos_EmbeddedFont', 'Aptos_MSFontService', Calibri, Helvetica, sans-serif;font-size:12pt;color:rgb(0,0,0);margin:0cm;">Ability to write, modify, and debug embedded tests in C for validation scenarios</li><li style="font-family:Aptos, 'Aptos_EmbeddedFont', 'Aptos_MSFontService', Calibri, Helvetica, sans-serif;font-size:12pt;color:rgb(0,0,0);margin:0cm;">IP functional validation like <i>I2C, CAN, SPI, EDM</i>, Flash (SD, emmc, UFS)</li><li style="font-family:Aptos, 'Aptos_EmbeddedFont', 'Aptos_MSFontService', Calibri, Helvetica, sans-serif;font-size:12pt;color:rgb(0,0,0);margin:0cm;">Proficiency with JTAG Debuggers, Oscilloscope, Logic Analyzer</li><li style="font-family:Aptos, 'Aptos_EmbeddedFont', 'Aptos_MSFontService', Calibri, Helvetica, sans-serif;font-size:12pt;color:rgb(0,0,0);margin:0cm;">NPU and ML validation may be required in this project- Not mandatory, added advantage </li></ul><p class="elementtoproof" style="margin-bottom:12pt;"><b><span style="font-size:11pt;font-family:Calibri, sans-serif;">Disclaimer:</span></b><span style="font-size:11pt;font-family:Calibri, sans-serif;"> </span></p><p></p><p> </p><p class="elementtoproof"><span style="font-size:11pt;font-family:Calibri, sans-serif;">At Tessolve, we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success. We are dedicated to creating aninclusive environment where all employees, regardless of their race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected. We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth.</span></p><p></p>

Collected experience requirement

5 - 10 Years