Sr. Design Lead

Tessolve · Bangalore

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Last observed by our collector: 9 October 2026 at 12:25 am IST. This is not a manual review or a confirmation from the employer.

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Collected role description

About Us:Tessolve is one of the largest global pureplay Digital ER&D silicon design services companies offering end-to-end turnkey new product design offerings with a unique combination of pre-silicon and post-silicon DNA to provide an efficient turnkey solution from silicon bring-up, and spec to the product design lifecycle. With a global engineering team of over 3200+ employees and a presence across 12 locations worldwide, Tessolve is a comprehensive one-stop product engineering services & technology solution provider. Our full services offerings span advanced silicon, hardware design, and embedded software capabilities, setting up Global Engineering Centres (GEC) bolstered by state-of-the-art infrastructure investments in silicon and system testing labs.Tessolve serves a diverse global clientele, including 9 of the top 10 semiconductor companies, OEMs & Tier 1 clients across multiple sectors, start-ups, and government & defense entities. Our global footprint includes offices in the United States, India, Singapore, Malaysia, Germany, United Kingdom, Canada, Netherlands, Japan, Taiwan, Thailand and the Philippines, with global delivery & testing labs strategically located in India, USA, Singapore, Germany and Malaysia. Visit us at <a href="http://www.tessolve.com" target="_blank" rel="noreferrer noopener">http://www.tessolve.com</a> to learn more.Key Skills and Responsibilities:<ul style="margin-top:0cm;" type="disc"> <li class="MsoNormal" style="color:#0E2841;">8-12 years of experience in SoC/IP Design.</li> <li class="MsoNormal" style="color:#0E2841;">Expertise in Writing Detailed IP Specifications, Micro Architecture, IP design, Subsystem and SoC level integration.</li> <li class="MsoNormal" style="color:#0E2841;">Expertise on RTL Development. Follow Coding Standards, expertise on Lint, CDC tools, Verification and Debugging of test cases, code and functional coverage analysis.</li> <li class="MsoNormal" style="color:#0E2841;">In-depth knowledge of Clocking Methodology, Low Power Implementation.</li> <li class="MsoNormal" style="color:#0E2841;">Hands on experience on writing constraints and exceptions, performing Synthesis, Timing Analysis and Design for Test Implementation.</li> <li class="MsoNormal" style="color:#0E2841;">Experience of power partitioning and usage of CPF/UPF.</li> <li class="MsoNormal" style="color:#0E2841;">Exposure to IP Design for ARM Microcontrollers based SoCs.</li> <li class="MsoNormal" style="color:#0E2841;">Good understanding of AMBA bus protocols (AXI, AHB, ATB, APB).</li> <li class="MsoNormal" style="color:#0E2841;">Knowledge of one or more of the interface protocols, PCIe, DDR, Ethernet, I2C, UART, SPI.</li> <li class="MsoNormal" style="color:#0E2841;">Experience in Matlab Simulations and Implementing Signal Processing IPs like Digital Filters, Math Functions or FFT engines.</li> <li class="MsoNormal" style="color:#0E2841;">Experience in developing Security IPs for various Encryption standards.</li> <li class="MsoNormal" style="color:#0E2841;">Experience in implementing On-chip Memory and Flash controllers.</li> </ul> Equal Opportunity Employer: At Tessolve, we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success. We are dedicated to creating an inclusive environment where all employees, regardless of their race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected. We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth.

Collected experience requirement

9 - 13 Years