Analog Layout Design Engineer

UAW Technologies India Private Limited (UANDWE) · Bangalore

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Last observed by our collector: 9 October 2026 at 12:27 am IST. This is not a manual review or a confirmation from the employer.

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Collected role description

Proficiency in Layout Design and Physical Verification tools and methodologies. Strong understanding of Circuit Design and Analog principles. Experience with analog circuits and their layout techniques. Experience in layouts like CTLE, DFE, IDAC, PLL, LDO, BGR, TX. Knowledge of semiconductor design processes and industry standards. Attention to detail and problem-solving abilities. Practical experience in Serdes/DDR layout design is highly advantageous Education & Experience: Bachelor's degree in Electrical Engineering, Electronics, or a related field. 4 - 5 years of experience on serdes/DDR layout experience. Preferably worked on TSMC 7NM, 5NM.

Collected experience requirement

Bachelor's degree in Electrical Engineering, Electronics, or a related field. 4 - 5 years of experience on serdes/DDR layout experience. Preferably worked on TSMC 7NM, 5NM.