Browse current jobs

Staff Digital Design Engineer

onsemi India · Bangalore

Apply on employer website

Source and collection record

Read the employer source

Last observed by our collector: . This is not a manual review or a confirmation from the employer.

Employer requisition: 2504470

Job type and experience labels are automated discovery categories. The employer determines eligibility. Original experience wording was not retained separately; check the current employer page.

How sourcing and classification work · Report a discrepancy

Your application evidence checklist

Mark the statements you can support after reading the employer source. This checklist stays on this page; it does not score your eligibility or submit an application.

0 of 3 checks marked. Keep unresolved requirements as questions for the employer.

Collected role description

OnSemi is seeking a Principal Digital Design Engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products including DC-DC PMIC/POL, Multiphase controllers, Dr. MOS, AC-DC converters, LED drivers, SiC drivers, Switches and efuses for consumer, industrial and automotive applications. In this role, you will focus on the following #LI-VS1 In this role, you will focus on the following Ownership of deploying platform front end tool flow Collaborate with cross-functional teams for seamless integration within the overall platform The candidate will work on digital design architecture, digital RTL, low power design, synthesis and timing analysis, Physical Design interface using state of the art RTL2GDS flows for IPs and full chip design The candidate will be able to work as part of a large and focused team of engineers and will be able to collaborate successfully as needed with design architects, digital verification, project management, and digital and analog design teams in multiple worldwide geographies Implement micro-architecture to RTL implementation with the refining of features requirements throughout the design process Work with methodology development teams to establish, streamline and enhance new and existing development methods, coding process and integration flows #LI-VS1 Qualifications BE in Electrical Engineering or related +12 years of experience, or MS + 10 years of experience in RTL Design/development Experience in working and leading Digital Design, Architecture and ASIC/Mixed signal chip developments The ideal candidate should have thorough understanding of the end-to-end digital design flow to accurately and efficiently collaborate with all members of the technical staff, both analog and digital, regarding overall project development progress and status Solid understanding of RTL design, CDC, ASIC synthesis, timing analysis and CDC, P&R, UPF and system Verilog (assertion) Solid understanding of Verilog, TCL and Perl/Python/XML programming languages Experience in platform-based development Excellent communication skills with a collaborative and team-oriented mindset Ability to quickly ramp on new systems and processes #LI-VS1

Collected minimum qualification

Experience in working and leading Digital Design, Architecture and ASIC/Mixed signal chip developments

Collected experience requirement

BE in Electrical Engineering or related +12 years of experience, or MS + 10 years of experience in RTL Design/development