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Physical design architecture

AMD · Bangalore

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Employer requisition: 92748

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Collected role description

<strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif;"><strong>ADVANCE YOUR CAREER. ADVANCE THE WORLD. </strong></span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif;">At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. </span></p><p style="margin: 0px;"> </p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif;">Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.</span></p> <br><strong class="jdheading"></strong><br><br><p style="margin-bottom: 0in;"><span style="font-size: 10pt;"><strong><span style="font-family: 'Arial',sans-serif; color: #333333;">THE ROLE:</span></strong></span></p><p style="margin-bottom: 0in;"><span style="font-family: Arial, sans-serif; color: #333333; font-size: 10pt;"> </span></p><p style="margin: 0in;"><span style="font-size: 10pt;"><span style="font-family: Arial, sans-serif; color: black;">The focus of this role in the AECG ASIC organization is to lead physical design architecture and flow development for next generation ASICs </span><span style="font-family: Arial, sans-serif; color: #333333;">that meet Engineering, Business and Customer requirements. </span></span></p><p style="margin-bottom: 0in;"><span style="font-family: Arial, sans-serif; color: #333333; font-size: 10pt;"> </span></p><p style="margin-bottom: 0in;"><span style="font-size: 10pt;"><strong><span style="font-family: 'Arial',sans-serif; color: #333333;">THE PERSON:</span></strong></span></p><p style="margin-bottom: 0in;"><span style="font-family: Arial, sans-serif; color: #333333; font-size: 10pt;"> </span></p><p style="margin-bottom: 0in;"><span style="font-family: Arial, sans-serif; color: #0e101a; font-size: 10pt;">AMD is looking for an engineering leader passionate about driving the best Power Performance Area (PPA) of ASIC solutions for AECG customers. The ideal candidate will have proven experience in driving physical design optimization to deliver industry leading performance/area and performance/power. In this role the candidate will work with the customer, SOC architects, the CAD team and the design team and drive floorplanning and physical design flows for best in class ASIC solutions.</span></p><p style="margin-bottom: 0in;"><span style="font-family: Arial, sans-serif; color: #333333; font-size: 10pt;"> </span></p><p style="margin: 0in;"><span style="font-size: 10pt;"><strong><span style="font-family: Arial, sans-serif; color: #333333;">KEY RESPONSIBILITIES: </span></strong></span></p><ul><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Technical Physical Design lead on AECG ASIC solutions, focused on driving the best Power, Performance, Area for customers.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Work with customers and internal teams to evaluate IP choices, analyze die size and provide floorplan tradeoffs during customer acquisition phase.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Provide expert guidance to physical design execution teams within AMD and with external partners to drive delivery to customer commitments.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Develop technical relationships with broader AMD Design/CAD community and peers.</span></li></ul><p style="margin: 0in;"><span style="font-size: 10pt; font-family: Arial, sans-serif;"> </span></p><p style="margin: 0in;"><span style="font-size: 10pt;"><strong><span style="font-family: Arial, sans-serif; color: #333333;">PREFERRED EXPERIENCE:</span></strong><span style="font-family: Arial, sans-serif; color: #333333;"> </span></span></p><ul><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; font-size: 10pt;">Strong understanding of development of custom ASICs for external customers.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Strong background in physical design with exposure to circuit and logic design.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Proven track record of delivering SOCs in process technologies 7nm and below.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Expert user of P&R, Timing and Physical verification tools from top EDA vendors.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Proven expertise in developing physical implementation flows as required.</span></li><li style="color: black;"><span style="font-family: Arial, sans-serif; color: #0e101a; font-size: 10pt;">Ability to co-optimize and make appropriate tradeoff across architecture, front-end design, and back-end design.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Experience in leading a small team of high performing individuals.</span></li></ul><p style="margin: 0in;"><span style="font-size: 10pt; font-family: Arial, sans-serif; color: #333333;"> </span></p><p style="margin: 0in;"><span style="font-size: 10pt;"><strong><span style="font-family: Arial, sans-serif; color: #333333;">EDUCATION & EXPERIENCE: </span></strong></span></p><ul><li><span style="font-size: 10pt; font-family: Arial, sans-serif; color: #333333;">BS or MS degree in in Electrical Engineering or Computer Science. 16+years of experience in physical design role leading to an understanding of RTL to GDS development.</span></li></ul><p><span style="font-size: 10pt; font-family: Arial, sans-serif; color: #333333;">#LI-SR4</span></p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described: </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;"> </span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p>

Collected minimum qualification

<p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described:&nbsp; </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;">&nbsp;</span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.&nbsp;&nbsp; We encourage applications from all qualified candidates and will accommodate applicants&rsquo; needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;">&nbsp;</span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.&nbsp; AMD&rsquo;s &ldquo;Responsible AI Policy&rdquo; is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">&nbsp;</span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p>

Collected preferred qualification

<p style="margin-bottom: 0in;"><span style="font-size: 10pt;"><strong><span style="font-family: 'Arial',sans-serif; color: #333333;">THE ROLE:</span></strong></span></p><p style="margin-bottom: 0in;"><span style="font-family: Arial, sans-serif; color: #333333; font-size: 10pt;">&nbsp;</span></p><p style="margin: 0in;"><span style="font-size: 10pt;"><span style="font-family: Arial, sans-serif; color: black;">The focus of this role in the AECG ASIC organization is to lead physical design architecture and flow development for next generation ASICs </span><span style="font-family: Arial, sans-serif; color: #333333;">that meet Engineering, Business and Customer requirements.&nbsp;&nbsp;</span></span></p><p style="margin-bottom: 0in;"><span style="font-family: Arial, sans-serif; color: #333333; font-size: 10pt;">&nbsp;</span></p><p style="margin-bottom: 0in;"><span style="font-size: 10pt;"><strong><span style="font-family: 'Arial',sans-serif; color: #333333;">THE PERSON:</span></strong></span></p><p style="margin-bottom: 0in;"><span style="font-family: Arial, sans-serif; color: #333333; font-size: 10pt;">&nbsp;</span></p><p style="margin-bottom: 0in;"><span style="font-family: Arial, sans-serif; color: #0e101a; font-size: 10pt;">AMD is looking for an engineering leader passionate about driving the best Power Performance Area (PPA) of ASIC solutions for AECG customers. The ideal candidate will have proven experience in driving physical design optimization to deliver industry leading performance/area and performance/power. In this role the candidate will work with the customer, SOC architects, the CAD team and the design team and drive floorplanning and physical design flows for best in class ASIC solutions.</span></p><p style="margin-bottom: 0in;"><span style="font-family: Arial, sans-serif; color: #333333; font-size: 10pt;">&nbsp;</span></p><p style="margin: 0in;"><span style="font-size: 10pt;"><strong><span style="font-family: Arial, sans-serif; color: #333333;">KEY RESPONSIBILITIES:&nbsp;</span></strong></span></p><ul><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Technical Physical Design lead on AECG ASIC solutions, focused on driving the best Power, Performance, Area for customers.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Work with customers and internal teams to evaluate IP choices, analyze die size and provide floorplan tradeoffs during customer acquisition phase.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Provide expert guidance to physical design execution teams within AMD and with external partners to drive delivery to customer commitments.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Develop technical relationships with broader AMD Design/CAD community and peers.</span></li></ul><p style="margin: 0in;"><span style="font-size: 10pt; font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0in;"><span style="font-size: 10pt;"><strong><span style="font-family: Arial, sans-serif; color: #333333;">PREFERRED EXPERIENCE:</span></strong><span style="font-family: Arial, sans-serif; color: #333333;">&nbsp;</span></span></p><ul><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; font-size: 10pt;">Strong understanding of development of custom ASICs for external customers.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Strong background in physical design with exposure to circuit and logic design.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Proven track record of delivering SOCs in process technologies 7nm and below.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Expert user of P&amp;R, Timing and Physical verification tools from top EDA vendors.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Proven expertise in developing physical implementation flows as required.</span></li><li style="color: black;"><span style="font-family: Arial, sans-serif; color: #0e101a; font-size: 10pt;">Ability to co-optimize and make appropriate tradeoff across architecture, front-end design, and back-end design.</span></li><li style="color: #0e101a;"><span style="font-family: Arial, sans-serif; color: black; font-size: 10pt;">Experience in leading a small team of high performing individuals.</span></li></ul><p style="margin: 0in;"><span style="font-size: 10pt; font-family: Arial, sans-serif; color: #333333;"> &nbsp;</span></p><p style="margin: 0in;"><span style="font-size: 10pt;"><strong><span style="font-family: Arial, sans-serif; color: #333333;">EDUCATION &amp; EXPERIENCE:&nbsp;</span></strong></span></p><ul><li><span style="font-size: 10pt; font-family: Arial, sans-serif; color: #333333;">BS or MS degree in in Electrical Engineering or Computer Science. 16+years of experience in physical design role leading to an understanding of RTL to GDS development.</span></li></ul><p><span style="font-size: 10pt; font-family: Arial, sans-serif; color: #333333;">#LI-SR4</span></p>

Collected experience requirement

16+ years