Synthesis STA silicon design Engineer

AMD · Hyderabad

Source and collection record

Last observed by our collector: 9 October 2026 at 12:45 am IST. This is not a manual review or a confirmation from the employer.

Employer requisition: 93315

Job type and experience labels are automated discovery categories. The employer determines eligibility. Original experience wording was not retained separately; check the current employer page.

How sourcing and classification work · Report a discrepancy

Your application evidence checklist

Mark the statements you can support after reading the employer source. This checklist stays on this page; it does not score your eligibility or submit an application.

Collected minimum qualification: Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.Attendance and availability: I checked the employer page for work location, office attendance, start date and duration.Current requisition: I checked the current employer requisition and its application requirements.

0 of 3 checks marked. Keep unresolved requirements as questions for the employer.

Collected role description

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. MTS Synthesis STA silicon design Engineer THE ROLE: The focus of this role is to lead by planning and executing the front end implementation of IP Subsystem and its physical partitions. This involves ownership of synthesis, LEC, CLP, prelayout STA and postlayout STA/Timing closure. Co-ordinate with design team and PNR teams. Guide team members on tenchical issues. KEY RESPONSIBILITIES: <ul><li>Responsible for front end implementation of IPs which includes synthesis, LEC, CLP, prelayout STA and postlayout STA/Timing closure</li><li>Collaborate with designer and PNR teams to achieve closure. </li><li>Understand duration required, plan and execute as per schedule.</li><li>Complete quality delivery for synthesis and timing closure.</li><li>Debug and resolve technical issues</li></ul> PREFERRED EXPERIENCE: <ul><li>Highly experienced in synthesis, LEC, CLP and timing closure</li><li>Experience in place and route (PNR) is plus.</li><li>Prefered top level or SOC level experience</li><li>Have handled blocks with complex designs, high frequency clocks and complex clocking</li><li>complete understanding of timing constraints, low power aspects and concepts of DFT</li><li>Have debug experience to solve issues.</li><li>scripting and automation</li></ul> ACADEMIC CREDENTIALS: <ul><li>Bachelors with 7 years of experience or Masters degree with 5 years of experience in Electrical Engineering</li></ul> #LI-AB1 Benefits offered are described: <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected minimum qualification

Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected preferred qualification

MTS Synthesis STA silicon design Engineer   THE ROLE: The focus of this role is to lead by planning and executing the front end implementation of IP Subsystem and its physical partitions. This involves ownership of synthesis, LEC, CLP, prelayout STA and postlayout STA/Timing closure. Co-ordinate with design team and PNR teams. Guide team members on tenchical issues.   KEY RESPONSIBILITIES:  <ul><li>Responsible for front end implementation of IPs which includes synthesis, LEC, CLP, prelayout STA and postlayout STA/Timing closure</li><li>Collaborate with designer and PNR teams to achieve closure. </li><li>Understand duration required, plan and execute as per schedule.</li><li>Complete quality delivery for synthesis and timing closure.</li><li>Debug and resolve technical issues</li></ul>  PREFERRED EXPERIENCE:  <ul><li>Highly experienced in synthesis, LEC, CLP and timing closure</li><li>Experience in place and route (PNR) is plus.</li><li>Prefered top level or SOC level experience</li><li>Have handled blocks with complex designs, high frequency clocks and complex clocking</li><li>complete understanding of timing constraints, low power aspects and concepts of DFT</li><li>Have debug experience to solve issues.</li><li>scripting and automation</li></ul>  ACADEMIC CREDENTIALS:  <ul><li>Bachelors with 7 years of experience or Masters degree with 5 years of experience in Electrical Engineering</li></ul> #LI-AB1

Collected experience requirement

7 years