Lead Server Performance Architect

<strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif;"><strong>ADVANCE YOUR CAREER. ADVANCE THE WORLD. </strong></span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif;">At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. </span></p><p style="margin: 0px;"> </p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif;">Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.</span></p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Lead Server Performance Architect:</span></strong></p><p style="margin: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-size: 11.0pt; font-family: Arial, sans-serif;"> </span></strong></p><p style="margin: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">AMD is looking for an outstanding technical contributor to help architect, validate & optimize performance of new features through full chip simulation & emulation platforms for AMD-based next-generation servers. As a passionate and dedicated Server Systems Performance Architect in the Server Performance Group, you will identify new opportunities to optimize server silicon for throughput and latency by identifying opportunities across all parts of silicon micro architecture and design spanning CPU, Data Fabric, Memory subsystem and IO. You will validate and analyze performance of various design features in pre silcon design env and correlate the profiling data with AMD performance model and eventually AMD silicon. You will quantify and isolate performance bottlenecks and share the insights to help new drive features into the next generation of server CPUs. The ideal candidate is expected to be well informed on latest trends in server design and verification, have a well-rounded understanding of performance requirements for server market and be able to quickly ascertain, in a data-driven manner, how next generation server CPUs and platforms should be engineered to support those needs</span></p><p style="margin: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"> </p><p style="margin: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Key Responsibilities</span></strong><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">:</span></p><ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="text-align: justify; margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Team Leadership</span></li><ul style="margin-top: 0in; margin-bottom: 0in;" type="circle"><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Lead and mentor a high-performing team of performance verification engineers.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Foster a culture of innovation, technical rigor, and continuous improvement.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Provide strategic direction across multiple concurrent verification programs.</span></li></ul><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Program Leadership</span></li><ul style="margin-top: 0in; margin-bottom: 0in;" type="circle"><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Define and execute the performance verification strategy for high-performance x86 server CPU.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Collaborate with architecture, u-arch, RTL, performance modeling, firmware, and software teams to define and validate performance KPIs.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Ensure timely delivery of simulation/emulation results, and optimization feedback loops.</span></li></ul><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Performance Analysis & Correlation</span></li><ul style="margin-top: 0in; margin-bottom: 0in;" type="circle"><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Develop and execute performance verification plans targeting IPC, latency, throughput, and power efficiency.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Capability to debug performance outliers thru Performance Monitoring Counters (PMC).</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Drive correlation between RTL and performance models, ensuring architectural intent is met.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Analyze performance bottlenecks using simulation, emulation, and silicon data.</span></li></ul><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Toolchain & Methodology</span></li><ul style="margin-top: 0in; margin-bottom: 0in;" type="circle"><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Build and maintain scalable, modular performance verification infrastructure.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Lead emulation-based performance setup and debug, enabling early performance validation.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Integrate performance regression, profiling, and analysis flows using industry-standard and custom tools.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Collaborate with compiler and OS teams to ensure software stack alignment with hardware performance goals.</span></li></ul><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">AI-Driven Infrastructure</span></li><ul style="margin-top: 0in; margin-bottom: 0in;" type="circle"><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Drive the development of AI/ML-based infrastructure to automate performance analysis, anomaly detection, and efficiency improvements.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Leverage data-driven techniques to optimize verification coverage and reduce debug cycles.</span></li></ul><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Cross-Functional Collaboration</span></li><ul style="margin-top: 0in; margin-bottom: 0in;" type="circle"><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Partner with x86 architecture, RTL design, physical design, and software teams to ensure performance targets are met.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Influence design decisions through data-backed performance insights.</span></li></ul><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Stakeholder Management</span></li><ul style="margin-top: 0in; margin-bottom: 0in;" type="circle"><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Align verification goals with business and product roadmaps.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Communicate performance status, risks, and trade-offs to executive leadership and stakeholders.</span></li></ul><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Industry Awareness</span></li><ul style="margin-top: 0in; margin-bottom: 0in;" type="circle"><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Stay current with trends in CPU architecture, performance modeling, and verification technologies.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Evaluate and adopt emerging tools and techniques to maintain a competitive edge.</span></li></ul></ul><p style="margin: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Preferred Experience</span></strong></p><ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">15+ years of industry experience with performance modeling and simulation tools (e.g., cycle-accurate simulators, emulators) with strong background in CPU microarchitecture, performance analysis, and system-level performance verification.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Proven leadership in managing large, cross-functional engineering teams.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Familiarity with PMC DV, latency and throughput validation, emulation platforms, and performance debug flows.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Deep understanding of x86 ISA, microarchitecture, and performance metrics.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Experience in developing performance test suites, performance triage tools, and simulation/emulation infrastructure.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Expertise in performance analysis tools, correlation techniques, and workload optimization.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Strong analytical and problem-solving skills with a data-driven mindset.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Deep knowledge of modern out-of-order CPU cores, memory subsystems, and performance modeling is a plus.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Experience with ML/AI techniques/frameworks for performance triage, infrastructure automation and prediction is a plus.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Exposure to high-performance computing (HPC), virtualization, or server-class CPUs.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Background in hardware/software co-design and performance-aware compiler optimizations.</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Familiarity with pre-silicon and post-silicon debug methodologies.</span></li></ul><p style="margin: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;"><br><strong>Position Requirements:</strong></span></p><ul style="margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Should have executed Emulation based functional and performance verification for multimillion gate SoC designs</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Should have strong exposure to RTL coding and SOC bringup debug</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Exceptional foundation in systems architecture, cutting across CPU, memory, storage and I/O subsystems</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Experience with hardware performance counter monitoring tools</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Should have exposure to performance profiling tools, preferably x86 based (e.g. linux perf, Windows perfmon)</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">MS/PhD in Computer Engineering / relevant coursework / thesis</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">Excellent communication skills (verbal, written, and presentation)</span></li><li style="margin-top: 0in; margin-right: 0in; margin-bottom: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">> 12 years relevant industry experience</span></li></ul><p style="margin: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"> </p><p style="margin: 0in; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 11.0pt; font-family: Arial, sans-serif;">#LI-PK1</span></p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described: </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;"> </span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p>