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Lead DFT DV Engineer

AMD · Hyderabad

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Employer requisition: 92685

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Collected role description

<strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif;"><strong>ADVANCE YOUR CAREER. ADVANCE THE WORLD. </strong></span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif;">At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. </span></p><p style="margin: 0px;"> </p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif;">Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.</span></p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0px; padding: 0px; color: windowtext;"><span style="font-size: 12pt;"><strong><span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;" data-ccp-charstyle="normaltextrun" data-ccp-charstyle-defn="{"ObjectId":"75ee5cbf-7016-4753-9550-8bbf976473cd|105","ClassId":1073872969,"Properties":[469775450,"normaltextrun",201340122,"1",134233614,"true",469778129,"normaltextrun",335572020,"1",469778324,"Default Paragraph Font"]}">LEAD DFT DV ENGINEER</span></span></strong><span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;" data-ccp-charstyle="eop" data-ccp-charstyle-defn="{"ObjectId":"75ee5cbf-7016-4753-9550-8bbf976473cd|106","ClassId":1073872969,"Properties":[469775450,"eop",201340122,"1",134233614,"true",469778129,"eop",335572020,"1",469778324,"Default Paragraph Font"]}"> </span></span><span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335551550":2,"335551620":2,"335559738":0,"335559739":0,"335559740":240}"> </span></span></p><p style="margin: 0px; padding: 0px; color: windowtext;"><span style="font-size: 12pt;"><span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;" data-ccp-charstyle="eop"> </span></span><span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></span></p><p style="margin: 0px; padding: 0px; color: windowtext;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><span style="font-weight: bold;">THE ROLE:</span> </span></p><p style="margin: 0in; margin-left: .375in; font-family: arial; font-size: 12.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">We are looking for an adaptive, self-motivative DFT engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The DFT team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. </span></p><p style="margin: 0in; margin-left: .375in; font-family: arial; font-size: 12.0pt;"> </p><p style="margin: 0in; margin-left: .375in; font-family: arial; font-size: 12.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><span style="font-weight: bold;">THE PERSON:</span> </span></p><p style="margin: 0in; margin-left: .375in; font-family: arial; font-size: 12.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">You have a passion for modern, digital design, and DFT in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. </span></p><p style="margin: 0px;"> </p><p style="margin: 0in; margin-left: .375in; font-family: arial; font-size: 12.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><span style="font-weight: bold;">PREFERRED EXPERIENCE:</span> </span></p><ul style="direction: ltr; unicode-bidi: embed; margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-left: 0in;"><span style="font-size: 12pt; font-family: Arial, sans-serif;">Good understanding and experience in DFT clocking and topology covering MBIST, JTAG verification, scan dump, understanding on ICL/PDL, debug scenarios like clock observation and analog observation, BScan, HSIO tests experience </span></li></ul><ul style="margin-top: 0in;"><li style="margin-left: 0in;"><span style="font-size: 12pt; font-family: Arial, sans-serif;">Experience in multi die scenarios verification is preferable</span></li><li style="margin-left: 0in;"><span style="font-size: 12pt;">Work closely with design /Arch team to prepare test list and complete the verification with all planned tests</span></li><li style="margin-left: 0in;"><span style="font-size: 12pt;">Develop scalable verification platform in System Verilog / UVM. Able to guide team in writing assertions and checkers.</span></li><li style="margin-left: 0in;"><span style="font-size: 12pt;">Be responsible for a comprehensive verification plan and drive the implementation of verification tests</span></li><li style="margin-left: 0in;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Responsible for SCAN, MBIST and JTAG verification</span></li></ul><p style="margin: 0px;"> </p><p style="margin: 0in; margin-left: .375in; font-family: arial; font-size: 12.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><span style="font-weight: bold;">ACADEMIC CREDENTIALS:</span> </span></p><p style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; font-family: arial, helvetica, sans-serif; font-size: 12pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Bachelors degree w/7+ years or Masters degree w/5+ years in Electronics engineering/Electrical Engineering</span></p><p style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; font-family: arial, helvetica, sans-serif;"> </p><p style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">#LI-AB1</span></p><p style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; font-family: arial, helvetica, sans-serif; font-size: 12pt;"> </p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described: </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;"> </span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p>

Collected minimum qualification

<p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described:&nbsp; </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;">&nbsp;</span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.&nbsp;&nbsp; We encourage applications from all qualified candidates and will accommodate applicants&rsquo; needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;">&nbsp;</span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.&nbsp; AMD&rsquo;s &ldquo;Responsible AI Policy&rdquo; is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">&nbsp;</span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p>

Collected preferred qualification

<p style="margin: 0px; padding: 0px; color: windowtext;"><span style="font-size: 12pt;"><strong><span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;" data-ccp-charstyle="normaltextrun" data-ccp-charstyle-defn="{&quot;ObjectId&quot;:&quot;75ee5cbf-7016-4753-9550-8bbf976473cd|105&quot;,&quot;ClassId&quot;:1073872969,&quot;Properties&quot;:[469775450,&quot;normaltextrun&quot;,201340122,&quot;1&quot;,134233614,&quot;true&quot;,469778129,&quot;normaltextrun&quot;,335572020,&quot;1&quot;,469778324,&quot;Default Paragraph Font&quot;]}">LEAD DFT DV ENGINEER</span></span></strong><span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;" data-ccp-charstyle="eop" data-ccp-charstyle-defn="{&quot;ObjectId&quot;:&quot;75ee5cbf-7016-4753-9550-8bbf976473cd|106&quot;,&quot;ClassId&quot;:1073872969,&quot;Properties&quot;:[469775450,&quot;eop&quot;,201340122,&quot;1&quot;,134233614,&quot;true&quot;,469778129,&quot;eop&quot;,335572020,&quot;1&quot;,469778324,&quot;Default Paragraph Font&quot;]}"> </span></span><span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-ccp-props="{&quot;134233117&quot;:false,&quot;134233118&quot;:false,&quot;201341983&quot;:0,&quot;335551550&quot;:2,&quot;335551620&quot;:2,&quot;335559738&quot;:0,&quot;335559739&quot;:0,&quot;335559740&quot;:240}">&nbsp;</span></span></p><p style="margin: 0px; padding: 0px; color: windowtext;"><span style="font-size: 12pt;"><span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;" data-ccp-charstyle="eop"> </span></span><span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-ccp-props="{&quot;134233117&quot;:false,&quot;134233118&quot;:false,&quot;201341983&quot;:0,&quot;335559738&quot;:0,&quot;335559739&quot;:0,&quot;335559740&quot;:240}">&nbsp;</span></span></p><p style="margin: 0px; padding: 0px; color: windowtext;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><span style="font-weight: bold;">THE ROLE:</span>&nbsp;</span></p><p style="margin: 0in; margin-left: .375in; font-family: arial; font-size: 12.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">We are looking for an adaptive, self-motivative DFT engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The DFT&nbsp;team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.&nbsp;</span></p><p style="margin: 0in; margin-left: .375in; font-family: arial; font-size: 12.0pt;">&nbsp;</p><p style="margin: 0in; margin-left: .375in; font-family: arial; font-size: 12.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><span style="font-weight: bold;">THE PERSON:</span>&nbsp;</span></p><p style="margin: 0in; margin-left: .375in; font-family: arial; font-size: 12.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">You have a passion for modern, digital design, and DFT in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.&nbsp;</span></p><p style="margin: 0px;">&nbsp;</p><p style="margin: 0in; margin-left: .375in; font-family: arial; font-size: 12.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><span style="font-weight: bold;">PREFERRED EXPERIENCE:</span>&nbsp;</span></p><ul style="direction: ltr; unicode-bidi: embed; margin-top: 0in; margin-bottom: 0in;" type="disc"><li style="margin-left: 0in;"><span style="font-size: 12pt; font-family: Arial, sans-serif;">Good understanding and experience in DFT clocking and topology covering MBIST, JTAG verification, scan dump, understanding on ICL/PDL, debug scenarios like clock observation and analog observation, BScan, HSIO tests experience </span></li></ul><ul style="margin-top: 0in;"><li style="margin-left: 0in;"><span style="font-size: 12pt; font-family: Arial, sans-serif;">Experience in multi die scenarios verification is preferable</span></li><li style="margin-left: 0in;"><span style="font-size: 12pt;">Work closely with design /Arch team to prepare test list and complete the verification with all planned tests</span></li><li style="margin-left: 0in;"><span style="font-size: 12pt;">Develop scalable verification platform in System Verilog / UVM. Able to guide team in writing assertions and checkers.</span></li><li style="margin-left: 0in;"><span style="font-size: 12pt;">Be responsible for a comprehensive verification plan and drive the implementation of verification tests</span></li><li style="margin-left: 0in;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Responsible for SCAN, MBIST and JTAG verification</span></li></ul><p style="margin: 0px;">&nbsp;</p><p style="margin: 0in; margin-left: .375in; font-family: arial; font-size: 12.0pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><span style="font-weight: bold;">ACADEMIC CREDENTIALS:</span>&nbsp;</span></p><p style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; font-family: arial, helvetica, sans-serif; font-size: 12pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Bachelors degree w/7+ years or Masters degree w/5+ years in Electronics engineering/Electrical Engineering</span></p><p style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; font-family: arial, helvetica, sans-serif;">&nbsp;</p><p style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">#LI-AB1</span></p><p style="margin-top: 0px; margin-bottom: 0px; vertical-align: middle; font-family: arial, helvetica, sans-serif; font-size: 12pt;">&nbsp;</p>

Collected experience requirement

7+ years