Physical Verification Engineer

AMD · Hyderabad

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Last observed by our collector: 9 October 2026 at 12:45 am IST. This is not a manual review or a confirmation from the employer.

Employer requisition: 87931

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Collected minimum qualification: Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.Attendance and availability: I checked the employer page for work location, office attendance, start date and duration.Current requisition: I checked the current employer requisition and its application requirements.

0 of 3 checks marked. Keep unresolved requirements as questions for the employer.

Collected role description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. Physical Verification / RDL Engineer <span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> KEY RESPONSIBILITIES: <ul style="margin-top: 0in;"><li>Hands on experience with Block level and Top-level physical verification.</li><li>Good understanding and hands-on experience in lower node technologies. (3nm and below)</li><li>Drive the RDL and MIMCAP closure for complex chiplets</li><li>Collaborate closely with cross-functional teams, including Physical Design, RTL Designers, to facilitate seamless integration and problem resolution.</li><li>Demonstrate strong problem-solving and work well with cross-functional teams</li><li>Good listening, writing, and speaking English</li><li>Good communication skills, strong interpersonal skills and flexibility</li><li>Dedicated, hardworking and good team player</li><li>Familiar with Unix/Linux environment and good at scripts</li></ul> PREFERRED EXPERIENCE: <ul style="margin-top: 0in;"><li>Hands on experience in Physical Verification incl. multi-voltage designs</li><li>Hands on experience in industry standard Place & Route tools such as Fusion Compiler , ICC2 and Innovus and also sign off tools like Siemens Caliber etc., </li><li>Strong understanding of low-power flows includes UPF concepts, power-gating, isolation, level-shifter, voltage areas, power-state tables, electrical checks using FM & VSI</li><li>Good control over scripting languages like Python, PERL, TCL and strong debug capabilities</li></ul> ACADEMIC CREDENTIALS: <ul style="margin-top: 0in;"><li>Masters or Bachelor’s degree in Electronics Engineering</li><li>8-12 years of experience in Physical Design flow and methodology development on advanced nodes below 3nm</li><li>Proficiency in one or more scripting languages namely Tcl, Perl, sed/awk</li><li>Strong problem-solving skills and analytical thinking</li><li>Team player, good work ethic, and excellent communication skills</li></ul>#LI-AA1 Benefits offered are described: <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected minimum qualification

Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected preferred qualification

Physical Verification / RDL Engineer <span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> KEY RESPONSIBILITIES:  <ul style="margin-top: 0in;"><li>Hands on experience with Block level and Top-level physical verification.</li><li>Good understanding and hands-on experience in lower node technologies. (3nm and below)</li><li>Drive the RDL and MIMCAP closure for complex chiplets</li><li>Collaborate closely with cross-functional teams, including Physical Design, RTL Designers, to facilitate seamless integration and problem resolution.</li><li>Demonstrate strong problem-solving and work well with cross-functional teams</li><li>Good listening, writing, and speaking English</li><li>Good communication skills, strong interpersonal skills and flexibility</li><li>Dedicated, hardworking and good team player</li><li>Familiar with Unix/Linux environment and good at scripts</li></ul>  PREFERRED EXPERIENCE:  <ul style="margin-top: 0in;"><li>Hands on experience in Physical Verification incl. multi-voltage designs</li><li>Hands on experience in industry standard Place & Route tools such as Fusion Compiler ,  ICC2 and Innovus and also sign off tools like Siemens Caliber etc., </li><li>Strong understanding of low-power flows includes UPF concepts, power-gating, isolation, level-shifter, voltage areas, power-state tables,  electrical checks using FM & VSI</li><li>Good control over scripting languages like Python, PERL, TCL and strong debug capabilities</li></ul>  ACADEMIC CREDENTIALS:  <ul style="margin-top: 0in;"><li>Masters or Bachelor’s degree in Electronics Engineering</li><li>8-12 years of experience in Physical Design flow and methodology development on advanced nodes below 3nm</li><li>Proficiency in one or more scripting languages namely Tcl, Perl, sed/awk</li><li>Strong problem-solving skills and analytical thinking</li><li>Team player, good work ethic, and excellent communication skills</li></ul>#LI-AA1

Collected experience requirement

8-12 years