Lead PCB Layout Engineer

AMD · Hyderabad

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Last observed by our collector: 9 October 2026 at 12:45 am IST. This is not a manual review or a confirmation from the employer.

Employer requisition: 91942

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Collected minimum qualification: Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.Attendance and availability: I checked the employer page for work location, office attendance, start date and duration.Current requisition: I checked the current employer requisition and its application requirements.

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Collected role description

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. THE ROLE:The AECG HW Design team is looking for Hardware Layout Lead with Hands on experience in driving and designing the Highspeed Hardware platforms. THE PERSON:This person should be self-driven and demonstrated good technical skills with successful HW Systems designs and should be able Lead multiple platform designs . A strong written and verbal communicator with strong problem solving skills along with professional interpersonal communication skills. <ul><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Key Responsibilities:<ul style="margin-bottom: 0in; margin-top: 0px;"><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Lead and deliver complex PCB layouts from concept to release, meeting electrical, mechanical, cost and schedule targets.</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Plan and execute placement, routing, length matching, differential pair tuning, shielding and via strategies aligned to SI/PI and EMC requirements</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Drive design-for-manufacturability (DFM), design-for-test (DFT), and design-for-assembly (DFA) best practices with contract manufacturers and suppliers</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Collaborate with hardware, SIPI, mechanical, manufacturing and assembly teams</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Collaborate with EE on schematic and SIPI for partitioning and constraint definition. Collaborate with ME on keepouts, board outline and enclosure integration</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Plan for reviews to resolve issues across ECAD/MCAD integration, SI/PI, thermal and mechanical constraint</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Mentor junior layout engineers; establish standards, checklists, and continuous improvement initiatives.</li></ul> Required Skills:<ul style="margin-bottom: 0in; margin-top: 0px;"><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Strong knowledge of analog & digital circuit Layout design using Cadence Allegro/OrCAD</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Generate and release manufacturing deliverables: Gerber/ODB++/IPC-2581, fab and assembly drawings, stackup documentation and drill files</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Run CAM verification on the PCB to ensure that all the design guidelines are followed as per the process</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Strong footprint creation and Library management using IPC standards</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Read and interpret circuit schematics provided by hardware engineers</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Constraint creation and modification in PCB Editor is must requirement</li></ul></li></ul>ACADEMIC CREDENTIALS: BS or MS degree in in Electrical Engineering or Computer Science. 10+years of experience #LI-SR4 Benefits offered are described: <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected minimum qualification

Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected preferred qualification

THE ROLE:The AECG HW Design team is looking for Hardware Layout Lead with Hands on experience in driving and designing the Highspeed Hardware platforms. THE PERSON:This person should be self-driven and demonstrated good technical skills with successful HW Systems designs and should be able Lead multiple platform designs . A strong written and verbal communicator with strong problem solving skills along with professional interpersonal communication skills. <ul><li style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Key Responsibilities:<ul style="margin-bottom: 0in; margin-top: 0px;"><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Lead and deliver complex PCB layouts from concept to release, meeting electrical, mechanical, cost and schedule targets.</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Plan and execute placement, routing, length matching, differential pair tuning, shielding and via strategies aligned to SI/PI and EMC requirements</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Drive design-for-manufacturability (DFM), design-for-test (DFT), and design-for-assembly (DFA) best practices with contract manufacturers and suppliers</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Collaborate with hardware, SIPI, mechanical, manufacturing and assembly teams</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Collaborate with EE on schematic and SIPI for partitioning and constraint definition. Collaborate with ME on keepouts, board outline and enclosure integration</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Plan for reviews to resolve issues across ECAD/MCAD integration, SI/PI, thermal and mechanical constraint</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Mentor junior layout engineers; establish standards, checklists, and continuous improvement initiatives.</li></ul> Required Skills:<ul style="margin-bottom: 0in; margin-top: 0px;"><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Strong knowledge of analog & digital circuit Layout design using Cadence Allegro/OrCAD</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Generate and release manufacturing deliverables: Gerber/ODB++/IPC-2581, fab and assembly drawings, stackup documentation and drill files</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Run CAM verification on the PCB to ensure that all the design guidelines are followed as per the process</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Strong footprint creation and Library management using IPC standards</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Read and interpret circuit schematics provided by hardware engineers</li><li style="margin: 0in 0in 0in 24px; font-size: 12pt; font-family: arial, helvetica, sans-serif;">Constraint creation and modification in PCB Editor is must requirement</li></ul></li></ul>ACADEMIC CREDENTIALS: BS or MS degree in in Electrical Engineering or Computer Science. 10+years of experience #LI-SR4

Collected experience requirement

10+ years