SOC Physical Design Lead
AMD · Hyderabad
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Employer requisition: 91605
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Collected role description
<strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif;"><strong>ADVANCE YOUR CAREER. ADVANCE THE WORLD. </strong></span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif;">At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. </span></p><p style="margin: 0px;"> </p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif;">Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.</span></p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>THE ROLE:</strong> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">The focus of this role is to plan, implement, and execute the physical design and verification of processing subsystems IP, resulting in meeting the signoff criteria for tapeout. </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>THE PERSON:</strong> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">You have a passion for modern, complex processor architecture, digital design, and Implementation in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>PREFERRED EXPERIENCE:</strong> </span></p><ul><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">12+ Years of experience in relevant domain.</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Experienced with Blocklevel and toplevel physical implementation.</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Good understanding and hands-on experience in lower node technologies. (5nm or below)</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Preferably working on low power or processor designs.</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Proficient in Working with various EDA tools. Innovus, Fusion compiler/ICCompiler2, Primetime etc.</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Scripting language experience: TCL, Python preferred. </span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Exposure to leadership or mentorship is an asset </span></li></ul><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>ACADEMIC CREDENTIALS:</strong> </span></p><ul><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Bachelors or Masters degree in computer engineering/Electrical Engineering </span></li></ul><p><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">#LI-SS1</span></p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described: </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;"> </span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p>
Collected minimum qualification
<p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described: </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;"> </span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p>
Collected preferred qualification
<p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>THE ROLE:</strong> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">The focus of this role is to plan, implement, and execute the physical design and verification of processing subsystems IP, resulting in meeting the signoff criteria for tapeout. </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>THE PERSON:</strong> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">You have a passion for modern, complex processor architecture, digital design, and Implementation in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>PREFERRED EXPERIENCE:</strong> </span></p><ul><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">12+ Years of experience in relevant domain.</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Experienced with Blocklevel and toplevel physical implementation.</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Good understanding and hands-on experience in lower node technologies. (5nm or below)</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Preferably working on low power or processor designs.</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Proficient in Working with various EDA tools. Innovus, Fusion compiler/ICCompiler2, Primetime etc.</span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Scripting language experience: TCL, Python preferred. </span></li><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Exposure to leadership or mentorship is an asset </span></li></ul><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>ACADEMIC CREDENTIALS:</strong> </span></p><ul><li><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Bachelors or Masters degree in computer engineering/Electrical Engineering </span></li></ul><p><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">#LI-SS1</span></p>
Collected experience requirement
12+ years