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Senior Lead Verification Engineer

AMD · Bangalore

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Collected role description

<strong class="jdheading"></strong><br><br><p style="margin: 0px; padding: 0px; color: windowtext;"><strong><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;">WHAT YOU DO AT AMD CHANGES EVERYTHING</span></span></strong><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-ccp-props="{}"> </span></p><p style="margin: 0px; padding: 0px; color: windowtext;"><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;">At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, </span><span style="margin: 0px; padding: 0px;">gaming</span><span style="margin: 0px; padding: 0px;"> and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human </span><span style="margin: 0px; padding: 0px; border-bottom: 1px solid transparent;">ingenuity</span><span style="margin: 0px; padding: 0px;"> and a shared passion to create something extraordinary. When you join AMD, </span><span style="margin: 0px; padding: 0px;">you’ll</span><span style="margin: 0px; padding: 0px;"> discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.</span><span style="margin: 0px; padding: 0px;"> </span></span><strong><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;">Together, we advance your career. </span></span></strong><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-ccp-props="{}"> </span></p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0px; padding: 0px; color: windowtext;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong><span style="margin: 0px; padding: 0px; color: #32363a;" data-contrast="none"><span style="margin: 0px; padding: 0px;">Senior Lead Verification Engineer<br><br></span></span></strong><strong><span style="margin: 0px; padding: 0px; color: #32363a;" data-contrast="none"><span style="margin: 0px; padding: 0px;">T</span><span style="margin: 0px; padding: 0px;">HE ROLE</span><span style="margin: 0px; padding: 0px;">:</span></span></strong><span style="margin: 0px; padding: 0px; color: #32363a;" data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></span></p><p style="margin: 0px; padding: 0px; color: windowtext;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><span style="margin: 0px; padding: 0px; color: #32363a;" data-contrast="none"><span style="margin: 0px; padding: 0px;">As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.</span></span><span style="margin: 0px; padding: 0px; color: #32363a;" data-ccp-props="{"201341983":0,"335551550":6,"335551620":6,"335559739":0,"335559740":240}"><br><br></span></span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>THE PERSON: </strong></span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">The preferred candidate will have proven experience verifying complex design blocks at the IP, Sub-system or SoC level using System Verilog/UVM or related technologies. He or she should be comfortable creating and executing on test plans in collaboration with design and verification colleagues in a metric-focused environment.</span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>KEY RESPONSIBILITIES: </strong></span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Develop and enhance System Verilog / UVM-based testbenches to verify new features for client, server, graphics, and semi-custom interconnects.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in the Infinity Fabric architecture.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Understand TestBench Architecture and develop expertise in TestBench Verification Components.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Mentor junior engineers.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>PREFERRED EXPERIENCE: </strong></span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Proficient in IP or Sub-system level ASIC verification </span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Architected and developed complex verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Exposure to RTL design, software development, formal verification, or other related domains.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Experience in UVM TestBench Development for complex designs preferred.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">12+ years of industry experience is preferred</span></p><p style="margin: 0px;"><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>ACADEMIC CREDENTIALS:</strong> </span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Bachelor’s or master’s degree in Electronics or Electrical or Computer engineering</span> </p><p style="margin: 0px;"> </p><p style="margin: 0px;"><span style="font-size: 12pt;"><span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif; color: #32363a;" data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}">#LI-SR5</span></span></p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described: </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;"> </span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p>

Collected minimum qualification

<p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described:&nbsp; </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;">&nbsp;</span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.&nbsp;&nbsp; We encourage applications from all qualified candidates and will accommodate applicants&rsquo; needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;">&nbsp;</span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.&nbsp; AMD&rsquo;s &ldquo;Responsible AI Policy&rdquo; is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">&nbsp;</span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p>

Collected preferred qualification

<p style="margin: 0px; padding: 0px; color: windowtext;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong><span style="margin: 0px; padding: 0px; color: #32363a;" data-contrast="none"><span style="margin: 0px; padding: 0px;">Senior Lead Verification Engineer<br><br></span></span></strong><strong><span style="margin: 0px; padding: 0px; color: #32363a;" data-contrast="none"><span style="margin: 0px; padding: 0px;">T</span><span style="margin: 0px; padding: 0px;">HE ROLE</span><span style="margin: 0px; padding: 0px;">:</span></span></strong><span style="margin: 0px; padding: 0px; color: #32363a;" data-ccp-props="{&quot;201341983&quot;:0,&quot;335559739&quot;:0,&quot;335559740&quot;:240}">&nbsp;</span></span></p><p style="margin: 0px; padding: 0px; color: windowtext;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><span style="margin: 0px; padding: 0px; color: #32363a;" data-contrast="none"><span style="margin: 0px; padding: 0px;">As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.</span></span><span style="margin: 0px; padding: 0px; color: #32363a;" data-ccp-props="{&quot;201341983&quot;:0,&quot;335551550&quot;:6,&quot;335551620&quot;:6,&quot;335559739&quot;:0,&quot;335559740&quot;:240}"><br><br></span></span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>THE PERSON: &nbsp;</strong></span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">The preferred candidate will have proven experience verifying complex design blocks at the IP, Sub-system or SoC level using System Verilog/UVM or related technologies. He or she should be comfortable creating and executing on test plans in collaboration with design and verification colleagues in a metric-focused environment.</span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"> &nbsp;</span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>KEY RESPONSIBILITIES: &nbsp;</strong></span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Develop and enhance System Verilog / UVM-based testbenches to verify new features for client, server, graphics, and semi-custom interconnects.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in the Infinity Fabric architecture.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Understand TestBench Architecture and develop expertise in TestBench Verification Components.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Mentor junior engineers.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">&nbsp;</span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>PREFERRED EXPERIENCE: &nbsp;</strong></span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Proficient in IP or Sub-system level ASIC verification&nbsp;</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Architected and developed complex verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Exposure to RTL design, software development, formal verification, or other related domains.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Experience in UVM TestBench Development for complex designs preferred.</span><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">12+ years of industry experience is preferred</span></p><p style="margin: 0px;"><br><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;"><strong>ACADEMIC CREDENTIALS:</strong> &nbsp;</span></p><p style="margin: 0px;"><span style="font-family: arial, helvetica, sans-serif; font-size: 12pt;">Bachelor&rsquo;s or master&rsquo;s&nbsp;degree in Electronics or Electrical or Computer engineering</span>&nbsp;</p><p style="margin: 0px;">&nbsp;</p><p style="margin: 0px;"><span style="font-size: 12pt;"><span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif; color: #32363a;" data-ccp-props="{&quot;134233117&quot;:false,&quot;134233118&quot;:false,&quot;201341983&quot;:0,&quot;335559738&quot;:0,&quot;335559739&quot;:0,&quot;335559740&quot;:240}">#LI-SR5</span></span></p>

Collected experience requirement

12+ years