RTL IP Design Engineer

AMD · Hyderabad

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Last observed by our collector: 9 October 2026 at 12:45 am IST. This is not a manual review or a confirmation from the employer.

Employer requisition: 71633

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Collected minimum qualification: Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.Attendance and availability: I checked the employer page for work location, office attendance, start date and duration.Current requisition: I checked the current employer requisition and its application requirements.

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Collected role description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. <span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335551550":2,"335551620":2,"335559738":0,"335559739":0,"335559740":240}">RTL IP Design Engineer <span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> THE ROLE: As a member of the Networking Technology Solutions Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. This exciting position as MTS will provide the opportunity to demonstrate strong technical collaboration across the design hierarchy from architecture to productization. Join us in providing innovative IP solutions as we embark on our journey into delivering the leading-edge IP Solutions for data center networking solutions THE PERSON:You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. KEY RESPONSIBILITIES: <ul style="margin-top: 0in;"><li style="color: #32363a; margin-bottom: 0in;">Define product features and micro-architecture requirements. Create technical specifications for IP blocks to meet those requirements, and provide technical guidance to design teams </li><li style="color: #32363a; margin-bottom: 0in;">Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop solutions to achieve product requirements </li></ul><ul style="margin-top: 0in;"><li style="color: #32363a; margin-bottom: 0in;">Work on high quality design deliverables with design qualifications like lint, CDC, synthesis and hand-off documentation </li><li style="color: #32363a; margin-bottom: 0in;">Knowledge sharing and other contributions to Platform & System Architecture </li><li style="color: #32363a; margin-bottom: 0in;">Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets and sign offs </li></ul><ul style="margin-top: 0in;"><li style="color: #32363a; margin-bottom: 0in;">Support Post-Si teams for Product Performance, Power and functional issues debug/resolution </li></ul> PREFERRED EXPERIENCE:<ul><li>A minimum of 10 years of experience is required</li><li>Proven experience in Silicon IP development process and design methodologies</li><li>Experience with Verilog RTL design, simulation, linting, CDC and other design qualifications, scripting etc..</li><li>Detailed understanding and proven track record of developing leading edge networking IP solutions such as Ethernet and industry standard security protocols</li><li>Detailed knowledge of PCIe is a plus</li><li style="color: #32363a;">Excellent communication and presentation skills </li><li style="color: #32363a;">Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies </li></ul> ACADEMIC CREDENTIALS: <ul style="margin-top: 0in;"><li style="color: black;">Bachelors or Masters degree in computer engineering/Electrical Engineering </li></ul> #LI-SK3 Benefits offered are described: <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected minimum qualification

Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected preferred qualification

<span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335551550":2,"335551620":2,"335559738":0,"335559739":0,"335559740":240}">RTL IP Design Engineer  <span style="margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;" data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> THE ROLE: As a member of the Networking Technology Solutions Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. This exciting position as MTS will provide the opportunity to demonstrate strong technical collaboration across the design hierarchy from architecture to productization. Join us in providing innovative IP solutions as we embark on our journey into delivering the leading-edge IP Solutions for data center networking solutions THE PERSON:You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc.  You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. KEY RESPONSIBILITIES: <ul style="margin-top: 0in;"><li style="color: #32363a; margin-bottom: 0in;">Define product features and micro-architecture requirements. Create technical specifications for IP blocks to meet those requirements, and provide technical guidance to design teams </li><li style="color: #32363a; margin-bottom: 0in;">Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop solutions to achieve product requirements </li></ul><ul style="margin-top: 0in;"><li style="color: #32363a; margin-bottom: 0in;">Work on high quality design deliverables with design qualifications like lint, CDC, synthesis and hand-off documentation </li><li style="color: #32363a; margin-bottom: 0in;">Knowledge sharing and other contributions to Platform & System Architecture  </li><li style="color: #32363a; margin-bottom: 0in;">Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets and sign offs </li></ul><ul style="margin-top: 0in;"><li style="color: #32363a; margin-bottom: 0in;">Support Post-Si teams for Product Performance, Power and functional issues debug/resolution </li></ul> PREFERRED EXPERIENCE:<ul><li>A minimum of 10 years of experience is required</li><li>Proven experience in Silicon IP development process and design methodologies</li><li>Experience with Verilog RTL design, simulation, linting, CDC and other design qualifications, scripting etc..</li><li>Detailed understanding and proven track record of developing leading edge networking IP solutions such as Ethernet and industry standard security protocols</li><li>Detailed knowledge of PCIe is a plus</li><li style="color: #32363a;">Excellent communication and presentation skills </li><li style="color: #32363a;">Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies </li></ul> ACADEMIC CREDENTIALS: <ul style="margin-top: 0in;"><li style="color: black;">Bachelors or Masters degree in computer engineering/Electrical Engineering </li></ul>       #LI-SK3

Collected experience requirement

10+ years