Manager – Post silicon Validation

AMD · Bangalore

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Last observed by our collector: 9 October 2026 at 12:45 am IST. This is not a manual review or a confirmation from the employer.

Employer requisition: 77008

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Collected minimum qualification: Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.Attendance and availability: I checked the employer page for work location, office attendance, start date and duration.Current requisition: I checked the current employer requisition and its application requirements.

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Collected role description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. MANAGER – Post Silicon SoC Validation and Power/Performance THE ROLE: As Manager-Post Silicon IP Validation in Embedded Group, you will own strategic planning, execution, and leadership for SoC enablement/validation, and power/performance attainment for highly leveraged embedded products. By managing both internal and external deliverables, you will work to ensure all embedded new products are executed and delivered on time. This critical and highly visible role provides an excellent growth opportunity for high performing individuals looking to make a difference and deliver a stand-out experience to customers of AMD. <span style="margin: 0px; padding: 0px;" data-ccp-charstyle="eop" data-ccp-charstyle-defn="{"ObjectId":"acd06137-8b58-41e2-a034-fbb48e07259f|121","ClassId":1073872969,"Properties":[469775450,"eop",201340122,"1",134233614,"true",469778129,"eop",335572020,"1",469778324,"Default Paragraph Font"]}"> THE PERSON: A successful candidate will have the ability to establish and drive to goals including plan of record, timelines, budget, scope, performance, and quality. A candidate must be self-motivated, must have a passion for working with a diverse team of creative engineers and senior executives, must be able to deftly manage both internal and external dependencies and ensure all embedded products are delivered on time. This role requires strong technical expertise in semiconductor systems, cross-functional collaboration, people management skills, and proven leadership in managing complex silicon validation programs. The candidate must be a team player with a commitment to meeting deadlines and an aptitude to thrive in a fast paced, multi-tasking environment. KEY RESPONSIBILITIES: <ul><li>SoC Enablement/Validation/Debug Activities<ul><li>Drive post-silicon IP enablement and functional/electrical validation activities</li><li>Identify and drive compliance activities with internal central teams and external labs</li><li>Ensure appropriate validation coverage across the IPs at various temperature range</li><li>Oversee critical debug and triage towards any Silicon related issues </li></ul></li><li>SoC Power and Performance Attainment<ul><li>Drive the teams for the bounding box attainment and ensuring validation for power/performance across PVT conditions</li><li>Oversee EDC/TDC tuning, CaC validation, and comprehensive power and thermal characterization</li></ul></li><li>Leadership & Team Development<ul><li>Build and mentor a high-performing team across the various domains</li><li>Define team goals, priorities, and meet execution plans aligned with program milestones</li><li>Plan headcount and allocate resources effectively</li><li>Collaborate with multi-functional leaders to drive AMD’s success</li></ul></li><li>Risk Management & Issue Resolution:<ul><li>Identify and mitigate risks related to feature enablement and validation coverage; ensure timely triage and resolution of blocking issues</li><li>Lead triage and resolution of blocking issues in coordination with architecture, validation, and debug teams.</li></ul></li><li>Stakeholder Communication:<ul><li>Provide crisp progress updates to management and stakeholders.</li><li>Maintain dashboards on status and issues for projects and deliverables in Confluence and use Jira/MS Project to track all the engineering work</li></ul></li></ul> PREFERRED EXPERIENCE: <ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin-left: 20.25pt;">Technical background in semiconductor industry with 5 years hands on work in Pre-Silicon activities, 5 years of program management experience and an overall industry experience of 15+ years</li><li style="margin-left: 20.25pt;">Good understanding of SoC architecture, RTL integration, and platform-level validation functions</li><li style="margin-left: 20.25pt;">Working experience handling Post-Silicon IP level enablement and validation activities</li><li style="margin-left: 20.25pt;">Hands-on with debug, triage, and validation procedures for all the interfaces and subsystems</li><li style="margin-left: 20.25pt;">Good exposure with resource and budget management for the team</li><li style="margin-left: 20.25pt;">Strong mentoring and coaching skills</li><li style="margin-left: 20.25pt;">Prior experience managing and leading engineering teams</li><li style="margin-left: 20.25pt;">Proven project & program management experience in dynamic and competitive industry </li><li style="margin-left: 20.25pt;">Ability to manage complex programs with multiple cross-functional dependencies.</li><li style="margin-left: 20.25pt;">Proficiency in planning tools (JIRA, Confluence, Sharepoint, MS Project) and reporting dashboards</li><li style="margin-left: 20.25pt;">Ability to structure and execute complex analysis, draw insights, and communicate summary findings/recommendations to senior management.</li><li style="margin-left: 20.25pt;">Ability to network, build relationships, and drive effective decision-making across multiple functions and levels within the organization</li><li style="margin-left: 20.25pt;">Highly organized, able to prioritize, and juggle multiple work streams to tight deadlines</li><li style="margin-left: 20.25pt;">Flexible working schedule to manage global (Asia and North America) program execution teams</li><li style="margin-left: 20.25pt;">Strong analytical and problem-solving skills</li></ul> ACADEMIC CREDENTIALS: <ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" data-leveltext="" data-font="Symbol" data-listid="12" data-list-defn-props="{"335552541":1,"335559684":-2,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" aria-setsize="-1" data-aria-posinset="1" data-aria-level="1"><span style="margin: 0px; padding: 0px;" data-ccp-parastyle="paragraph" data-ccp-parastyle-defn="{"ObjectId":"acd06137-8b58-41e2-a034-fbb48e07259f|122","ClassId":1073872969,"Properties":[469775450,"paragraph",201340122,"2",134233614,"true",469778129,"paragraph",335572020,"1",469777841,"Times New Roman",469777842,"Times New Roman",469777843,"Times New Roman",469777844,"Times New Roman",469769226,"Times New Roman",134233118,"true",134233117,"true",469778324,"Normal"]}">Bachelors or Masters degree in computer engineering/Electrical Engineering </li><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" data-leveltext="" data-font="Symbol" data-listid="12" data-list-defn-props="{"335552541":1,"335559684":-2,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" aria-setsize="-1" data-aria-posinset="1" data-aria-level="1">Engineering degree with 15+ years of industry experience</li><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" data-leveltext="" data-font="Symbol" data-listid="12" data-list-defn-props="{"335552541":1,"335559684":-2,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" aria-setsize="-1" data-aria-posinset="1" data-aria-level="1">Excellent communication and inter-personal skills.</li></ul> #LI-NR1 Benefits offered are described: <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected minimum qualification

Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Collected preferred qualification

MANAGER – Post Silicon SoC Validation and Power/Performance THE ROLE: As Manager-Post Silicon IP Validation in Embedded Group, you will own strategic planning, execution, and leadership for SoC enablement/validation, and power/performance attainment for highly leveraged embedded products. By managing both internal and external deliverables, you will work to ensure all embedded new products are executed and delivered on time. This critical and highly visible role provides an excellent growth opportunity for high performing individuals looking to make a difference and deliver a stand-out experience to customers of AMD. <span style="margin: 0px; padding: 0px;" data-ccp-charstyle="eop" data-ccp-charstyle-defn="{"ObjectId":"acd06137-8b58-41e2-a034-fbb48e07259f|121","ClassId":1073872969,"Properties":[469775450,"eop",201340122,"1",134233614,"true",469778129,"eop",335572020,"1",469778324,"Default Paragraph Font"]}">   THE PERSON: A successful candidate will have the ability to establish and drive to goals including plan of record, timelines, budget, scope, performance, and quality. A candidate must be self-motivated, must have a passion for working with a diverse team of creative engineers and senior executives, must be able to deftly manage both internal and external dependencies and ensure all embedded products are delivered on time. This role requires strong technical expertise in semiconductor systems, cross-functional collaboration, people management skills, and proven leadership in managing complex silicon validation programs. The candidate must be a team player with a commitment to meeting deadlines and an aptitude to thrive in a fast paced, multi-tasking environment.    KEY RESPONSIBILITIES: <ul><li>SoC Enablement/Validation/Debug Activities<ul><li>Drive post-silicon IP enablement and functional/electrical validation activities</li><li>Identify and drive compliance activities with internal central teams and external labs</li><li>Ensure appropriate validation coverage across the IPs at various temperature range</li><li>Oversee critical debug and triage towards any Silicon related issues </li></ul></li><li>SoC Power and Performance Attainment<ul><li>Drive the teams for the bounding box attainment and ensuring validation for power/performance across PVT conditions</li><li>Oversee EDC/TDC tuning, CaC validation, and comprehensive power and thermal characterization</li></ul></li><li>Leadership & Team Development<ul><li>Build and mentor a high-performing team across the various domains</li><li>Define team goals, priorities, and meet execution plans aligned with program milestones</li><li>Plan headcount and allocate resources effectively</li><li>Collaborate with multi-functional leaders to drive AMD’s success</li></ul></li><li>Risk Management & Issue Resolution:<ul><li>Identify and mitigate risks related to feature enablement and validation coverage; ensure timely triage and resolution of blocking issues</li><li>Lead triage and resolution of blocking issues in coordination with architecture, validation, and debug teams.</li></ul></li><li>Stakeholder Communication:<ul><li>Provide crisp progress updates to management and stakeholders.</li><li>Maintain dashboards on status and issues for projects and deliverables in Confluence and use Jira/MS Project to track all the engineering work</li></ul></li></ul> PREFERRED EXPERIENCE: <ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin-left: 20.25pt;">Technical background in semiconductor industry with 5 years hands on work in Pre-Silicon activities, 5 years of program management experience and an overall industry experience of 15+ years</li><li style="margin-left: 20.25pt;">Good understanding of SoC architecture, RTL integration, and platform-level validation functions</li><li style="margin-left: 20.25pt;">Working experience handling Post-Silicon IP level enablement and validation activities</li><li style="margin-left: 20.25pt;">Hands-on with debug, triage, and validation procedures for all the interfaces and subsystems</li><li style="margin-left: 20.25pt;">Good exposure with resource and budget management for the team</li><li style="margin-left: 20.25pt;">Strong mentoring and coaching skills</li><li style="margin-left: 20.25pt;">Prior experience managing and leading engineering teams</li><li style="margin-left: 20.25pt;">Proven project & program management experience in dynamic and competitive industry </li><li style="margin-left: 20.25pt;">Ability to manage complex programs with multiple cross-functional dependencies.</li><li style="margin-left: 20.25pt;">Proficiency in planning tools (JIRA, Confluence, Sharepoint, MS Project) and reporting dashboards</li><li style="margin-left: 20.25pt;">Ability to structure and execute complex analysis, draw insights, and communicate summary findings/recommendations to senior management.</li><li style="margin-left: 20.25pt;">Ability to network, build relationships, and drive effective decision-making across multiple functions and levels within the organization</li><li style="margin-left: 20.25pt;">Highly organized, able to prioritize, and juggle multiple work streams to tight deadlines</li><li style="margin-left: 20.25pt;">Flexible working schedule to manage global (Asia and North America) program execution teams</li><li style="margin-left: 20.25pt;">Strong analytical and problem-solving skills</li></ul> ACADEMIC CREDENTIALS: <ul style="margin: 0px; padding: 0px; font-family: verdana;"><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" data-leveltext="" data-font="Symbol" data-listid="12" data-list-defn-props="{"335552541":1,"335559684":-2,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" aria-setsize="-1" data-aria-posinset="1" data-aria-level="1"><span style="margin: 0px; padding: 0px;" data-ccp-parastyle="paragraph" data-ccp-parastyle-defn="{"ObjectId":"acd06137-8b58-41e2-a034-fbb48e07259f|122","ClassId":1073872969,"Properties":[469775450,"paragraph",201340122,"2",134233614,"true",469778129,"paragraph",335572020,"1",469777841,"Times New Roman",469777842,"Times New Roman",469777843,"Times New Roman",469777844,"Times New Roman",469769226,"Times New Roman",134233118,"true",134233117,"true",469778324,"Normal"]}">Bachelors or Masters degree in computer engineering/Electrical Engineering </li><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" data-leveltext="" data-font="Symbol" data-listid="12" data-list-defn-props="{"335552541":1,"335559684":-2,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" aria-setsize="-1" data-aria-posinset="1" data-aria-level="1">Engineering degree with 15+ years of industry experience</li><li style="margin: 0px 0px 0px 24px; padding: 0px; font-size: 11pt; font-family: Arial, Arial_MSFontService, sans-serif;" data-leveltext="" data-font="Symbol" data-listid="12" data-list-defn-props="{"335552541":1,"335559684":-2,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" aria-setsize="-1" data-aria-posinset="1" data-aria-level="1">Excellent communication and inter-personal skills.</li></ul> #LI-NR1

Collected experience requirement

5 years