Pre/Post Silicon Validation Framework/Tools / Infra development engineer, Sr Lead | Qualcomm

expertise in Embedded Software Architecture, Framework Design, and Infrastructure Development using C, C++, and Assembly. Proven experience designing and developing scalable software frameworks, platform abstraction layers, middleware, validation infrastructure, and reusable system software components. Extensive experience in low-level software development, including boot code, exception handling, interrupt management, startup sequences, and C-Assembly interworking. Deep understanding of CPU architectures and microarchitectural concepts, including ARMv8/ARMv9, x86, and Power PC architectures. Strong expertise in multicore, multiprocessor, and heterogeneous So C environments, including SMP, AMP, heterogeneous compute subsystems, and cross-core software interactions. Demonstrated ability to debug complex system-level issues spanning hardware, firmware, operating systems, framework software, and validation infrastructure. Strong understanding of cache coherency, I/O coherency, memory ordering, synchronization primitives, inter-processor communication, and concurrency-related issues. Deep knowledge of So C architecture, including compute subsystems, memory hierarchies, interconnect fabrics, power management, and system infrastructure IPs. Strong understanding of Operating Systems, RTOS, and Linux kernel internals, including multithreading, scheduling policies, locking mechanisms, interrupt handling, virtual memory, MMU architecture, and kernel synchronization primitives. Deep understanding of memory management, weakly ordered memory models, cache architectures, pipelining, memory barriers, TLBs, coherency protocols, and performance optimization techniques. Strong expertise in software build infrastructure, compiler toolchains, linker internals, Makefiles, linker/scatter scripts, and build system architecture. Proficiency with GCC, Clang/LLVM, ARM toolchains, code optimization techniques, and root-causing complex compiler and linker issues. Strong debugging expertise using JTAG, trace, emulation, FPGA, and silicon debug tools. Proficiency in Python and Shell scripting for automation, framework development, debug, and productivity tooling. Experience architecting and developing large-scale embedded software frameworks or validation infrastructure used across multiple engineering teams and So C programs. Experience with silicon bring-up, board bring-up, post-silicon validation, and hardware-software integration. Hands-on experience with pre-silicon emulation, FPGA prototyping, and post-silicon debug environments. Strong understanding of ARM-based So C architectures, memory hierarchies, cache coherency protocols, interconnect fabrics, and system infrastructure IPs. Experience developing framework abstractions supporting heterogeneous processing elements such as application processors, real-time processors, DSPs, AI/ML accelerators, and security subsystems. Familiarity with CI/CD systems, automated regression infrastructure, release management, and software quality methodologies. Experience with JTAG, Lauterbach Trace32, hardware trace, and performance analysis tools. Experience with source code management systems such as Git and Perforce. Familiarity with build automation, containerized development environments, and scalable software deployment workflows. Experience mentoring engineers and driving technical direction for framework and infrastructure development initiatives. Architect, design, develop, and maintain scalable embedded software frameworks, validation infrastructure, and platform software for pre-silicon and post-silicon So C validation. Develop reusable framework components, platform abstraction layers, middleware, and system software services supporting multicore and heterogeneous compute environments. Drive software architecture and framework design to enable portability, scalability, maintainability, and reuse across multiple So C programs and IP validation domains. Develop and maintain bring-up, validation, and debug infrastructure for bare-metal, lightweight RTOS, emulation, FPGA, and post-silicon environments. Debug and root-cause complex system-level issues spanning hardware, firmware, operating systems, framework software, memory subsystems, coherency fabrics, and system infrastructure IPs. Develop framework capabilities supporting multicore, multiprocessor, and heterogeneous CPU architectures, including system-level synchronization, coherency, and performance optimization. Design, implement, and optimize automated validation, regression, and release workflows to improve productivity, quality, and scalability. Integrate static analysis, code-quality tools, build systems, and release processes into Continuous Integration (CI) environments. Collaborate closely with architecture, design, verification, firmware, software, and validation teams to enable efficient silicon bring-up, feature validation, and debug. Drive continuous improvements in software quality, framework architecture, automation, and validation methodologies. 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