STA
TCS · Bangalore
Source and collection record
Last observed by our collector: . This is not a manual review or a confirmation from the employer.
Employer requisition: 431642
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Collected role description
About the Unit TCS IAE is redefining the future of industry by embedding intelligence across engineering, manufacturing, asset, and service value chains. Powered by AI, connected ecosystems, and autonomous operations, it transforms insights into action—creating self-optimizing, resilient, and intelligent enterprises at scale. By seamlessly converging the physical and digital worlds, TCS IAE is enabling a new era of AI-first enterprises where systems continuously learn, adapt, and evolve—driving measurable outcomes and shaping how industries operate for the future. Role: Static Timing Analysis (STA) Roles & Responsibilities · Perform static timing analysis using Synopsys PrimeTime or Cadence Tempus · Develop, validate, and maintain SDC constraints including clocks and exceptions · Analyze setup/hold, transition, capacitance, and path-based violations · Support timing closure and ECO implementation with PD teams · Execute MCMM analysis across PVT corners and modes · Participate in timing signoff reviews and documentation Tools & Skills · Static Timing Analysis: Synopsys PrimeTime (DMSA), Cadence Tempus · Timing Concepts: OCV, AOCV, POCV, CRPR, Signal Integrity · Physical Design Awareness: ICC2, Fusion Compiler, Innovus · Low Power Timing: UPF/CPF, power-gated designs · Scripting: Tcl (mandatory), Perl/Python (preferred)</p
Collected minimum qualification
BACHELOR OF TECHNOLOGY
Collected experience requirement
3 - 15 Years